Some PCIe devices require longer time to response. Increase polling counter to 20000 (~100ms).
Signed-off-by: Ley Foon Tan <ley.foon....@intel.com> --- drivers/pci/pcie_intel_fpga.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c index 3cdf05b314..e74b35ac16 100644 --- a/drivers/pci/pcie_intel_fpga.c +++ b/drivers/pci/pcie_intel_fpga.c @@ -56,7 +56,7 @@ #define TLP_COMP_STATUS(s) (((s) >> 13) & 7) #define TLP_BYTE_COUNT(s) (((s) >> 0) & 0xfff) #define TLP_HDR_SIZE 3 -#define TLP_LOOP 500 +#define TLP_LOOP 20000 #define DWORD_MASK 3 #define IS_ROOT_PORT(pcie, bdf) \ -- 2.19.0 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
