Hi Manivannan,
>
> Add support for Avenger96 board from Arrow Electronics based on STM32MP157
> MPU. This board is one of the Consumer Edition (CE) boards of the 96Boards
> family and has the following features:
>
> SoC: STM32MP157AAC
> PMIC: STPMIC1A
> RAM: 1024 Mbyte @ 533MHz
> Storage: eMMC v4.51: 8 Gbyte
> microSD Socket: UHS-1 v3.01
> Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant
> Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac
> Bluetooth®v4.2 (BR/EDR/BLE)
> USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG
> Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4
> LED: 4x User LED, 1x WiFi LED, 1x BT LED
>
> More information about this board can be found in 96Boards website:
> https://www.96boards.org/product/avenger96/
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasi...@linaro.org>
> ---
> arch/arm/dts/Makefile | 1 +
> .../arm/dts/stm32mp157a-avenger96-u-boot.dtsi | 191 +++++++++
> arch/arm/dts/stm32mp157a-avenger96.dts | 362 ++++++++++++++++++
> board/st/stm32mp1/README | 23 ++
> 4 files changed, 577 insertions(+)
> create mode 100644 arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
> create mode 100644 arch/arm/dts/stm32mp157a-avenger96.dts
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index
> b4dc57edbd1..97a182f3abc 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -711,6 +711,7 @@ dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
>
> dtb-$(CONFIG_TARGET_STM32MP1) += \
> stm32mp157a-dk1.dtb \
> + stm32mp157a-avenger96.dtb \
> stm32mp157c-dk2.dtb \
> stm32mp157c-ed1.dtb \
> stm32mp157c-ev1.dtb
Minor, board added not in alphabetical oder....
dtb-$(CONFIG_TARGET_STM32MP1) += \
stm32mp157a-avenger96.dtb \
stm32mp157a-dk1.dtb \
stm32mp157c-dk2.dtb \
stm32mp157c-ed1.dtb \
stm32mp157c-ev1.dtb
> diff --git a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
> b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
> new file mode 100644
> index 00000000000..1ff681afb87
> --- /dev/null
> +++ b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
> @@ -0,0 +1,191 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> +/*
> + * Copyright : STMicroelectronics 2018
> + *
> + * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
> + * Author: Manivannan Sadhasivam <manivannan.sadhasi...@linaro.org>
> + */
> +
> +#include <dt-bindings/clock/stm32mp1-clksrc.h>
> +#include "stm32mp157-u-boot.dtsi"
> +#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
> +
> +/ {
> + aliases {
> + mmc0 = &sdmmc1;
> + mmc1 = &sdmmc2;
> + usb0 = &usbotg_hs;
> + };
> +
> + config {
> + u-boot,boot-led = "led1";
> + u-boot,error-led = "led4";
> + };
> +};
> +
> +&i2c4 {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&i2c4_pins_a {
> + u-boot,dm-pre-reloc;
> + pins {
> + u-boot,dm-pre-reloc;
> + };
> +};
> +
> +&pmic {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&rcc {
> + st,clksrc = <
> + CLK_MPU_PLL1P
> + CLK_AXI_PLL2P
> + CLK_MCU_PLL3P
> + CLK_PLL12_HSE
> + CLK_PLL3_HSE
> + CLK_PLL4_HSE
> + CLK_RTC_LSE
> + CLK_MCO1_DISABLED
> + CLK_MCO2_DISABLED
> + >;
> +
> + st,clkdiv = <
> + 1 /*MPU*/
> + 0 /*AXI*/
> + 0 /*MCU*/
> + 1 /*APB1*/
> + 1 /*APB2*/
> + 1 /*APB3*/
> + 1 /*APB4*/
> + 2 /*APB5*/
> + 23 /*RTC*/
> + 0 /*MCO1*/
> + 0 /*MCO2*/
> + >;
> +
> + st,pkcs = <
> + CLK_CKPER_HSE
> + CLK_FMC_ACLK
> + CLK_QSPI_ACLK
> + CLK_ETH_DISABLED
> + CLK_SDMMC12_PLL4P
> + CLK_DSI_DSIPLL
> + CLK_STGEN_HSE
> + CLK_USBPHY_HSE
> + CLK_SPI2S1_PLL3Q
> + CLK_SPI2S23_PLL3Q
> + CLK_SPI45_HSI
> + CLK_SPI6_HSI
> + CLK_I2C46_HSI
> + CLK_SDMMC3_PLL4P
> + CLK_USBO_USBPHY
> + CLK_ADC_CKPER
> + CLK_CEC_LSE
> + CLK_I2C12_HSI
> + CLK_I2C35_HSI
> + CLK_UART1_HSI
> + CLK_UART24_HSI
> + CLK_UART35_HSI
> + CLK_UART6_HSI
> + CLK_UART78_HSI
> + CLK_SPDIF_PLL4P
> + CLK_FDCAN_PLL4Q
> + CLK_SAI1_PLL3Q
> + CLK_SAI2_PLL3Q
> + CLK_SAI3_PLL3Q
> + CLK_SAI4_PLL3Q
> + CLK_RNG1_LSI
> + CLK_RNG2_LSI
> + CLK_LPTIM1_PCLK1
> + CLK_LPTIM23_PCLK3
> + CLK_LPTIM45_LSE
> + >;
> +
> + /* VCO = 1300.0 MHz => P = 650 (CPU) */
> + pll1: st,pll@0 {
> + cfg = < 2 80 0 0 0 PQR(1,0,0) >;
> + frac = < 0x800 >;
> + u-boot,dm-pre-reloc;
> + };
> +
> + /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
> + pll2: st,pll@1 {
> + cfg = < 2 65 1 0 0 PQR(1,1,1) >;
> + frac = < 0x1400 >;
> + u-boot,dm-pre-reloc;
> + };
> +
> + /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
> + pll3: st,pll@2 {
> + cfg = < 1 33 1 16 36 PQR(1,1,1) >;
> + frac = < 0x1a04 >;
> + u-boot,dm-pre-reloc;
> + };
> +
> + /* VCO = 480.0 MHz => P = 120, Q = 40, R = 96 */
> + pll4: st,pll@3 {
> + cfg = < 1 39 3 11 4 PQR(1,1,1) >;
> + u-boot,dm-pre-reloc;
> + };
> +};
> +
> +&sdmmc1 {
> + u-boot,dm-spl;
> +};
> +
> +&sdmmc1_b4_pins_a {
> + u-boot,dm-spl;
> + pins {
> + u-boot,dm-spl;
> + };
> +};
> +
> +&sdmmc1_dir_pins_a {
> + u-boot,dm-spl;
> + pins {
> + u-boot,dm-spl;
> + };
> +};
> +
> +&sdmmc2 {
> + u-boot,dm-spl;
> +};
> +
> +&sdmmc2_b4_pins_a {
> + u-boot,dm-spl;
> + pins {
> + u-boot,dm-spl;
> + };
> +};
> +
> +&sdmmc2_d47_pins_a {
> + u-boot,dm-spl;
> + pins {
> + u-boot,dm-spl;
> + };
> +};
> +
> +&uart4 {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&uart4_pins_b {
> + u-boot,dm-pre-reloc;
> + pins1 {
> + u-boot,dm-pre-reloc;
> + };
> + pins2 {
> + u-boot,dm-pre-reloc;
> + };
> +};
> +
> +&usbotg_hs {
> + u-boot,force-b-session-valid;
> + hnp-srp-disable;
> +};
> +
> +&v3v3 {
> + regulator-always-on;
> +};
> diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts
> b/arch/arm/dts/stm32mp157a-avenger96.dts
> new file mode 100644
> index 00000000000..dd0859769bf
> --- /dev/null
> +++ b/arch/arm/dts/stm32mp157a-avenger96.dts
> @@ -0,0 +1,362 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> +/*
> + * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
> + * Author: Alexandre Torgue <alexandre.tor...@st.com> for
> STMicroelectronics.
> + *
> + * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
> + * Author: Manivannan Sadhasivam <manivannan.sadhasi...@linaro.org>
> + */
> +
> +/dts-v1/;
> +
> +#include "stm32mp157c.dtsi"
> +#include "stm32mp157-pinctrl.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/mfd/st,stpmic1.h>
> +
> +/ {
> + model = "Arrow Electronics STM32MP157A Avenger96 board";
> + compatible = "st,stm32mp157a-avenger96", "st,stm32mp157";
> +
> + aliases {
> + ethernet0 = ðernet0;
> + serial0 = &uart4;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory@c0000000 {
> + reg = <0xc0000000 0x40000000>;
> + };
> +
> + led {
> + compatible = "gpio-leds";
> + led1 {
> + label = "green:user1";
> + gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + default-state = "off";
> + };
> +
> + led2 {
> + label = "green:user2";
> + gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "mmc0";
> + default-state = "off";
> + };
> +
> + led3 {
> + label = "green:user3";
> + gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "mmc1";
> + default-state = "off";
> + };
> +
> + led4 {
> + label = "green:user3";
> + gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "none";
> + default-state = "off";
> + panic-indicator;
> + };
> +
> + led5 {
> + label = "yellow:wifi";
> + gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "phy0tx";
> + default-state = "off";
> + };
> +
> + led6 {
> + label = "blue:bt";
> + gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "bluetooth-power";
> + default-state = "off";
> + };
> + };
> +};
> +
> +ðernet0 {
> + status = "okay";
> + pinctrl-0 = <ðernet0_rgmii_pins_a>;
> + pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>;
> + pinctrl-names = "default", "sleep";
> + phy-mode = "rgmii";
> + max-speed = <1000>;
> + phy-handle = <&phy0>;
> +
> + mdio0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> + phy0: ethernet-phy@7 {
> + reg = <7>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c1_pins_b>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +};
> +
> +&i2c2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_pins_b>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +};
> +
> +&i2c4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c4_pins_a>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + pmic: stpmic@33 {
> + compatible = "st,stpmic1";
> + reg = <0x33>;
> + interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + status = "okay";
> +
> + st,main-control-register = <0x04>;
> + st,vin-control-register = <0xc0>;
> + st,usb-control-register = <0x30>;
> +
> + regulators {
> + compatible = "st,stpmic1-regulators";
> +
> + ldo1-supply = <&v3v3>;
> + ldo2-supply = <&v3v3>;
> + ldo3-supply = <&vdd_ddr>;
> + ldo5-supply = <&v3v3>;
> + ldo6-supply = <&v3v3>;
> + pwr_sw1-supply = <&bst_out>;
> + pwr_sw2-supply = <&bst_out>;
> +
> + vddcore: buck1 {
> + regulator-name = "vddcore";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-always-on;
> + regulator-initial-mode = <2>;
> + regulator-over-current-protection;
> + };
> +
> + vdd_ddr: buck2 {
> + regulator-name = "vdd_ddr";
> + regulator-min-microvolt = <1350000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-always-on;
> + regulator-initial-mode = <2>;
> + regulator-over-current-protection;
> + };
> +
> + vdd: buck3 {
> + regulator-name = "vdd";
> + regulator-min-microvolt = <2500000>;
> + regulator-max-microvolt = <2500000>;
> + regulator-always-on;
> + st,mask_reset;
> + regulator-initial-mode = <8>;
> + regulator-over-current-protection;
> + };
> +
> + v3v3: buck4 {
> + regulator-name = "v3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-over-current-protection;
> + regulator-initial-mode = <8>;
> + };
> +
> + vdda: ldo1 {
> + regulator-name = "vdda";
> + regulator-min-microvolt = <2900000>;
> + regulator-max-microvolt = <2900000>;
> + interrupts = <IT_CURLIM_LDO1 0>;
> + interrupt-parent = <&pmic>;
> + };
> +
> + v2v8: ldo2 {
> + regulator-name = "v2v8";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + interrupts = <IT_CURLIM_LDO2 0>;
> + interrupt-parent = <&pmic>;
> + };
> +
> + vtt_ddr: ldo3 {
> + regulator-name = "vtt_ddr";
> + regulator-min-microvolt = <0000000>;
> + regulator-max-microvolt = <1000000>;
> + regulator-always-on;
> + regulator-over-current-protection;
> + };
> +
> + vdd_usb: ldo4 {
> + regulator-name = "vdd_usb";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + interrupts = <IT_CURLIM_LDO4 0>;
> + interrupt-parent = <&pmic>;
> + };
> +
> + vdd_sd: ldo5 {
> + regulator-name = "vdd_sd";
> + regulator-min-microvolt = <2900000>;
> + regulator-max-microvolt = <2900000>;
> + interrupts = <IT_CURLIM_LDO5 0>;
> + interrupt-parent = <&pmic>;
> + regulator-boot-on;
> + };
> +
> + v1v8: ldo6 {
> + regulator-name = "v1v8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + interrupts = <IT_CURLIM_LDO6 0>;
> + interrupt-parent = <&pmic>;
> + };
> +
> + vref_ddr: vref_ddr {
> + regulator-name = "vref_ddr";
> + regulator-always-on;
> + regulator-over-current-protection;
> + };
> +
> + bst_out: boost {
> + regulator-name = "bst_out";
> + interrupts = <IT_OCP_BOOST 0>;
> + interrupt-parent = <&pmic>;
> + };
> +
> + vbus_otg: pwr_sw1 {
> + regulator-name = "vbus_otg";
> + interrupts = <IT_OCP_OTG 0>;
> + interrupt-parent = <&pmic>;
> + regulator-active-discharge;
> + };
> +
> + vbus_sw: pwr_sw2 {
> + regulator-name = "vbus_sw";
> + interrupts = <IT_OCP_SWOUT 0>;
> + interrupt-parent = <&pmic>;
> + regulator-active-discharge;
> + };
> + };
> +
> + onkey {
> + compatible = "st,stpmic1-onkey";
> + interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
> + interrupt-names = "onkey-falling", "onkey-rising";
> + status = "okay";
> + };
> +
> + watchdog {
> + compatible = "st,stpmic1-wdt";
> + status = "disabled";
> + };
> + };
> +};
> +
> +&iwdg2 {
> + timeout-sec = <32>;
> + status = "okay";
> +};
> +
> +&pwr {
> + pwr-supply = <&vdd>;
> +};
> +
> +&rng1 {
> + status = "okay";
> +};
> +
> +&rtc {
> + status = "okay";
> +};
> +
> +&sdmmc1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
> + broken-cd;
> + st,sig-dir;
> + st,neg-edge;
> + st,use-ckin;
> + bus-width = <4>;
> + vmmc-supply = <&vdd_sd>;
> + status = "okay";
> +};
> +
> +&sdmmc2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
> + non-removable;
> + no-sd;
> + no-sdio;
> + st,neg-edge;
> + bus-width = <8>;
> + vmmc-supply = <&v3v3>;
> + mmc-ddr-3_3v;
> + status = "okay";
> +};
> +
> +&spi2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi2_pins_a>;
> + status = "okay";
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart4_pins_b>;
> + status = "okay";
> +};
> +
> +&uart7 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart7_pins_a>;
> + status = "okay";
> +};
> +
> +&usbh_ehci {
> + phys = <&usbphyc_port0>;
> + phy-names = "usb";
> + status = "okay";
> +};
> +
> +&usbotg_hs {
> + dr_mode = "peripheral";
> + phys = <&usbphyc_port1 0>;
> + phy-names = "usb2-phy";
> + status = "okay";
> +};
> +
> +&usbphyc {
> + status = "okay";
> +};
> +
> +&usbphyc_port0 {
> + phy-supply = <&vdd_usb>;
> +};
> +
> +&usbphyc_port1 {
> + phy-supply = <&vdd_usb>;
> +};
> diff --git a/board/st/stm32mp1/README b/board/st/stm32mp1/README index
> 1cd3534ae4e..b0c83250612 100644
> --- a/board/st/stm32mp1/README
> +++ b/board/st/stm32mp1/README
> @@ -37,6 +37,7 @@ Currently the following boards are supported:
> + stm32mp157c-ed1
> + stm32mp157a-dk1
> + stm32mp157c-dk2
> ++ stm32mp157a-avenger96
>
> 3. Boot Sequences
> =================
> @@ -84,6 +85,9 @@ the supported device trees for stm32mp157 are:
> + dk2: Discovery board = dk1 with a BT/WiFI combo and a DSI panel
> dts: stm32mp157c-dk2
>
> ++ avenger96: Avenger96 board from Arrow Electronics
> + dts: stm32mp157a-avenger96
> +
> 5. Build Procedure
> ==================
>
> @@ -140,6 +144,11 @@ the supported device trees for stm32mp157 are:
> # make stm32mp15_basic_defconfig
> # make DEVICE_TREE=stm32mp157c-dk2 all
>
> + d) basic boot on avenger96
> + # export KBUILD_OUTPUT=stm32mp15_basic
> + # make stm32mp15_basic_defconfig
> + # make DEVICE_TREE=stm32mp157a-avenger96 all
> +
> 6. Output files
>
> BootRom and TF-A expect binaries with STM32 image header @@ -182,6
> +191,20 @@ You can select the boot mode, on the board ed1 with the switch
> SW1
> SD-Card 1 1
> Recovery 0 0
>
> +- Boot mode of Avenger96 can be selected using switch S3
> +
> + -----------------------------------
> + Boot Mode BOOT2 BOOT1 BOOT0
> + -----------------------------------
> + Recovery 0 0 0
> + NOR 0 0 1
> + SD-Card 1 0 1
> + eMMC 0 1 0
> + NAND 0 1 1
> + Reserved 1 0 0
> + Recovery 1 1 0
> + SD-Card 1 1 1
> +
> Recovery is a boot from serial link (UART/USB) and it is used with
> STM32CubeProgrammer tool to load executable in RAM and to update the flash
> devices available on the board (NOR/NAND/eMMC/SDCARD).
> --
> 2.17.1
Except the minor remarks (because I can update it in the pull request)
Reviewed-by: Patrick Delaunay <patrick.delau...@st.com>
Thanks
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