On 5/3/19 7:56 PM, Ang, Chee Hong wrote:
> On Fri, 2019-05-03 at 19:04 +0200, Marek Vasut wrote:
>> On 5/3/19 5:53 PM, Ang, Chee Hong wrote:
>>>
>>> On Fri, 2019-05-03 at 11:55 +0200, Marek Vasut wrote:
>>>>
>>>> On 5/3/19 10:18 AM, chee.hong....@intel.com wrote:
>>>>>
>>>>>
>>>>> From: "Ang, Chee Hong" <chee.hong....@intel.com>
>>>> Commit message is missing -- why do you need to enable the DMA330
>>>> ?
>>>>
>>>> Don't you have a reset driver, like A10 and Gen5 ?
>>> DMA driver for S10 is still missing in u-boot. I need to enable
>>> this
>>> for booting Linux which is required by Linux's DMA driver.
>>> I will add the reason to enable DMA330 in the commit message.
>> Can you also answer my question regarding the reset driver ?
> Yes. S10 has a reset driver in drivers/reset/reset-socfpga.c.
So why don't you use it ? :-)
>>>>> Signed-off-by: Ang, Chee Hong <chee.hong....@intel.com>
>>>>> ---
>>>>> arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 1 +
>>>>> arch/arm/mach-socfpga/spl_s10.c | 4
>>>>> ++++
>>>>> 2 files changed, 5 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm/mach-
>>>>> socfpga/include/mach/reset_manager_s10.h
>>>>> b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
>>>>> index e186296..3ac46c3 100644
>>>>> --- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
>>>>> +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
>>>>> @@ -95,6 +95,7 @@ struct socfpga_reset_manager {
>>>>> #define RSTMGR_DMA RSTMGR_DEFINE(1, 16)
>>>>> #define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 17)
>>>>> #define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 18)
>>>>> +#define RSTMGR_DMA_OCP RSTMGR_DEFINE(1, 21)
>>>>> #define RSTMGR_L4WD0 RSTMGR_DEFINE(2, 0)
>>>>> #define RSTMGR_L4WD1 RSTMGR_DEFINE(2, 1)
>>>>> #define RSTMGR_L4WD2 RSTMGR_DEFINE(2, 2)
>>>>> diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-
>>>>> socfpga/spl_s10.c
>>>>> index a141ffe..e063229 100644
>>>>> --- a/arch/arm/mach-socfpga/spl_s10.c
>>>>> +++ b/arch/arm/mach-socfpga/spl_s10.c
>>>>> @@ -158,6 +158,10 @@ void board_init_f(ulong dummy)
>>>>> writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS,
>>>>> &sysmgr_regs->dma);
>>>>> writel(SYSMGR_DMAPERIPH_ALL_NS, &sysmgr_regs-
>>>>>> dma_periph);
>>>>>
>>>>> + /* enable DMA330 DMA */
>>>>> + socfpga_per_reset(SOCFPGA_RESET(DMA), 0);
>>>>> + socfpga_per_reset(SOCFPGA_RESET(DMA_OCP), 0);
>>>>> +
>>>>> spl_disable_firewall_l4_per();
>>>>>
>>>>> spl_disable_firewall_l4_sys();
>>>>>
--
Best regards,
Marek Vasut
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