In case the ddr training was failing, it couldn't reset, it was just
hanging. Therefore reimplement it, so when ddr training is failing
it would call _machine_restart, which power downs the DDR and does
a force reset.
Signed-off-by: Horatiu Vultur <horatiu.vul...@microchip.com>
---
arch/mips/mach-mscc/include/mach/ddr.h | 14 ++++++++++++++
arch/mips/mach-mscc/reset.c | 5 +----
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/arch/mips/mach-mscc/include/mach/ddr.h
b/arch/mips/mach-mscc/include/mach/ddr.h
index 84ecfbd..97dac3e 100644
--- a/arch/mips/mach-mscc/include/mach/ddr.h
+++ b/arch/mips/mach-mscc/include/mach/ddr.h
@@ -464,6 +464,19 @@ static inline void hal_vcoreiii_ddr_reset_assert(void)
ICPU_RESET_MEM_RST_FORCE, BASE_CFG + ICPU_RESET);
}
+#if defined(CONFIG_SOC_SERVAL)
+static inline void hal_vcoreiii_ddr_failed(void)
+{
+ register u32 reset;
+
+ pr_err("DDR training failed\n");
+
+ /* Jump to reset - does not return */
+ reset = KSEG0ADDR(_machine_restart);
+ icache_lock((void *)reset, 128); // Reset while running from cache
+ asm volatile ("jr %0" : : "r" (reset));
+}
+#else // JR2 || ServalT
static inline void hal_vcoreiii_ddr_failed(void)
{
writel(0, BASE_CFG + ICPU_RESET);
@@ -471,6 +484,7 @@ static inline void hal_vcoreiii_ddr_failed(void)
panic("DDR init failed\n");
}
+#endif /* Serval */
#endif /* JR2 || ServalT || Serval */
/*
diff --git a/arch/mips/mach-mscc/reset.c b/arch/mips/mach-mscc/reset.c
index a555fc9..95fe0d8 100644
--- a/arch/mips/mach-mscc/reset.c
+++ b/arch/mips/mach-mscc/reset.c
@@ -28,16 +28,13 @@ void _machine_restart(void)
ICPU_RESET_CORE_RST_FORCE,
BASE_CFG + ICPU_RESET);
#elif defined(CONFIG_SOC_SERVAL)
- register unsigned long i;
-
/* Prevent VCore-III from being reset with a global reset */
writel(ICPU_RESET_CORE_RST_PROTECT, BASE_CFG + ICPU_RESET);
/* Do global reset */
writel(PERF_SOFT_RST_SOFT_CHIP_RST, BASE_DEVCPU_GCB + PERF_SOFT_RST);
- for (i = 0; i < 1000; i++)
- ;
+ mdelay(100);
/* Power down DDR for clean DDR re-training */
writel(readl(BASE_CFG + ICPU_MEMCTRL_CTRL) |
--
2.7.4
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