On Wed, Mar 27, 2019 at 9:44 AM Ley Foon Tan <ley.foon....@intel.com> wrote:
>
> Add QSPI device tree to Stratix 10.
> Sync from Linux Stratix 10 dts.
Which tree? Which commit?
>
> Tested on Stratix 10 SoC devkit.
> SOCFPGA_STRATIX10 # sf probe 0:0
> SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256
> MiB
>
> Signed-off-by: Ley Foon Tan <ley.foon....@intel.com>
>
> ---
> v3->v4:
> - Add qspi node to dtsi based on alphabetical order
> - Add spi-tx-bus-width and spi-rx-bus-width
>
> v2->v3:
> - Change flash compatible to "jedec,spi-nor"
> - Change spi-max-frequency to 100MHz
> ---
> arch/arm/dts/socfpga_stratix10.dtsi | 15 +++++++++++++++
> arch/arm/dts/socfpga_stratix10_socdk.dts | 23 +++++++++++++++++++++++
> 2 files changed, 38 insertions(+)
>
> diff --git a/arch/arm/dts/socfpga_stratix10.dtsi
> b/arch/arm/dts/socfpga_stratix10.dtsi
> index ee93725d648..fde76774047 100644
> --- a/arch/arm/dts/socfpga_stratix10.dtsi
> +++ b/arch/arm/dts/socfpga_stratix10.dtsi
> @@ -237,6 +237,21 @@
> reg = <0xffe00000 0x100000>;
> };
>
> + qspi: spi@ff8d2000 {
> + compatible = "cdns,qspi-nor";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0xff8d2000 0x100>,
> + <0xff900000 0x100000>;
> + interrupts = <0 3 4>;
> + cdns,fifo-depth = <128>;
> + cdns,fifo-width = <4>;
> + cdns,trigger-address = <0x00000000>;
> + bus-num = <0>;
> + status = "disabled";
> + u-boot,dm-pre-reloc;
This file should be in sync with the Linux one, no? Does the Linux on
havethis U-Boot specific property here? I could check myself if you would
have given a tree or commit id of the sync source in the commit message...
If the Linux dts does not have this property, it would have to be moved
to a U-Boot specific "-u-boot.dtsi" addon file.
> + };
> +
> rst: rstmgr@ffd11000 {
> #reset-cells = <1>;
> compatible = "altr,rst-mgr";
> diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts
> b/arch/arm/dts/socfpga_stratix10_socdk.dts
> index c59b77d8298..438b43fef6b 100644
> --- a/arch/arm/dts/socfpga_stratix10_socdk.dts
> +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts
> @@ -10,6 +10,7 @@
>
> aliases {
> serial0 = &uart0;
> + spi0 = &qspi;
> };
>
> chosen {
> @@ -87,6 +88,28 @@
> smplsel = <0>;
> };
>
> +&qspi {
> + status = "okay";
> +
> + flash@0 {
> + u-boot,dm-pre-reloc;
Same as above.
Regards,
Simon
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + reg = <0>; /* chip select */
> + spi-max-frequency = <100000000>;
> +
> + page-size = <256>;
> + block-size = <16>; /* 2^16, 64KB */
> + cdns,tshsl-ns = <50>;
> + cdns,tsd2d-ns = <50>;
> + cdns,tchsh-ns = <4>;
> + cdns,tslch-ns = <4>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
> &uart0 {
> status = "okay";
> };
> --
> 2.19.0
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