On Tue, Mar 19, 2019 at 11:05:43AM -0600, Stephen Warren wrote: > On 3/19/19 6:12 AM, Thierry Reding wrote: > > On Mon, Mar 18, 2019 at 12:31:32PM -0600, Stephen Warren wrote: > > > On 3/8/19 1:10 PM, Thierry Reding wrote: > > > > From: Thierry Reding <tred...@nvidia.com> > > > > > > > > In order to support chainloading of U-Boot by an earlier bootloader, > > > > make sure the binary is position independent, so that the earlier boot- > > > > loader can relocate it if necessary. > > > > > > Why not enable this for all 64-bit Tegra? They're all booted the exact > > > same > > > way at least with recent L4T builds. > > > > Yeah, I think that would make sense. > > > > > Also, U-Boot is typically linked to the address that cboot loads it to, > > > and > > > cboot typically always loads to precisely that address. I'm not sure why > > > this patch is required. > > > > I encountered this issue when I was trying to chainload U-Boot from > > cboot on Jetson TX1. It seems like your above comment is no longer true, > > though I suppose that could just mean that the link address for U-Boot > > has become stale? > > Looks like the upstream CONFIG_SYS_TEXT_BASE is indeed stale relative to the > latest L4T builds: > > Upstream: > Jetson TX1: CONFIG_SYS_TEXT_BASE=0x80110000 > Jetson TX2: CONFIG_SYS_TEXT_BASE=0x80080000 > > L4T r32.1: > Jetson TX1: #define CONFIG_SYS_TEXT_BASE 0x80080000 > Jetson TX2: #define CONFIG_SYS_TEXT_BASE 0x80080000
Okay, let me fix that up while at it. I think the 0x80110000 text base was something that we cargo-culted from 32-bit ARM boards. I vaguely recall that this might have been related to the SPL split in some way, but I can't find anything to corroborate that. > > > That said, it don't think it harms anything, so I'm fine with it being > > > applied. > > > > I suppose there's a bit of extra code to do the indirect jumps, but > > overall U-Boot seems to work well and not noticeably slower if this is > > enabled. Might be nice for extra flexibility and to avoid any surprises > > if we ever end up loading U-Boot to a location other than where it was > > liked to. > > > > My understanding is that this could happen on Tegra186 if cboot detects > > bad memory blocks in the area where U-Boot was meant to be loaded to. I > > guess this doesn't apply to earlier chips, but perhaps it's good to have > > it there for consistency anyway. > > Yes, this could happen on Jetson TX2i at least. Let me send out a proposal than makes all 64-bit Tegra builds position independent and throws in the TEXT_BASE changes discussed above. Thierry
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