Set MMCIF clock rate to 97.5 MHz, which is the default according
to Gen2 datasheet.
Signed-off-by: Marek Vasut <marek.vasut+rene...@gmail.com>
Cc: Nobuhiro Iwamatsu <iwama...@nigauri.org>
Cc: Jaehoon Chung <jh80.ch...@samsung.com>
---
drivers/mmc/sh_mmcif.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c
index 306daf1415..c8875ce8f8 100644
--- a/drivers/mmc/sh_mmcif.c
+++ b/drivers/mmc/sh_mmcif.c
@@ -696,7 +696,7 @@ static int sh_mmcif_dm_probe(struct udevice *dev)
return ret;
}
- host->clk = clk_get_rate(&sh_mmcif_clk);
+ host->clk = clk_set_rate(&sh_mmcif_clk, 97500000);
plat->cfg.name = dev->name;
plat->cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS;
--
2.20.1
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