On 3/6/19 11:46 AM, Ismael Luceno Cortes wrote:
> Setting up the delay only needs to be done once; move it to
> rcar_i2c_set_speed so it's done at initialization time.
>
> Signed-off-by: Ismael Luceno <ismael.luc...@silicon-gears.com>
Reviewed-by: Marek Vasut <marek.vasut+rene...@gmail.com>
> ---
> drivers/i2c/rcar_i2c.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c
> index 10b0f8bad4..a57f72a228 100644
> --- a/drivers/i2c/rcar_i2c.c
> +++ b/drivers/i2c/rcar_i2c.c
> @@ -116,9 +116,7 @@ static int rcar_i2c_set_addr(struct udevice *dev, u8
> chip, u8 read)
> writel(0, priv->base + RCAR_I2C_ICMSR);
> writel(priv->icccr, priv->base + RCAR_I2C_ICCCR);
>
> - if (priv->type == RCAR_I2C_TYPE_GEN3)
> - writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR);
> -
> + /* Wait for the bus */
> ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMCR,
> RCAR_I2C_ICMCR_FSDA, false, 2, true);
> if (ret) {
> @@ -304,6 +302,11 @@ scgd_find:
> priv->icccr = (scgd << RCAR_I2C_ICCCR_SCGD_OFF) | cdf;
> writel(priv->icccr, priv->base + RCAR_I2C_ICCCR);
>
> + if (priv->type == RCAR_I2C_TYPE_GEN3) {
> + /* Set SCL/SDA delay */
> + writel(RCAR_I2C_ICFBSCR_TCYC17, priv->base + RCAR_I2C_ICFBSCR);
> + }
> +
> return 0;
> }
>
>
> base-commit: f08023c07d826fbc8e62fdd3367961b2f0b06844
> prerequisite-patch-id: 9e5b0458bc15640eb483ccad91dbe85150f9f7be
>
--
Best regards,
Marek Vasut
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