Am 27.02.2019 um 19:55 schrieb Tom Rini:
On Wed, Feb 27, 2019 at 11:15:23AM +0100, Simon Goldschmidt wrote:
Tom,
On Thu, Feb 14, 2019 at 10:20 AM Simon Goldschmidt
<simon.k.r.goldschm...@gmail.com> wrote:
On Thu, Feb 14, 2019 at 7:26 AM Heinrich Schuchardt <xypron.g...@gmx.de> wrote:
The SPL image for the Tinker Board has to fit into 32 KiB. This includes
up to 2 KiB for the file header.
A new configuration variable CONFIG_SPL_WITH_DTB_SIZE_LIMIT is introduced
to define the board specific limit.
Signed-off-by: Heinrich Schuchardt <xypron.g...@gmx.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com>
Is this planned for v2019.04? I know we're in rc phase, but this patch
adds a new config
option so shouldn't interfere with boards not using it.
Plus if we have this SPL size check in v2019.04, it would probably
enable more board
maintainers testing/fixing the SPL size check after the release.
I really want to get the generic version of this in, yes.
Which generic version? Was there some kind of generic follow-up patch I
missed?
I would like to implement a real & working SPL size check for socfpga
(including pre-reloc malloc, gd and stack) which builds on this.
Regards,
Simon
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