Hi,
I was looking for a solution to some linker problem and was hoping that
some linker cracks here on the list have some idea:
The generic ARMv8 ("arm64") code provides an exception vector table,
which architecturally requires a 2KB alignment. At the moment we don't
take any special measures about it, so we end up with a random padding
between 0 and 2044 bytes before the table:
0 bytes n * 2KB
| |
<code before table><padding>|<vector table> <code after table>
The vector table takes up a bit more than 1KB, so we happily use the
space after that and can't afford to just waste the rest of the 2KB slot
(by putting it at the end of the code, for instance).
Depending on the link order some code ends up before the table, other
behind it, with seemingly random effects on the resulting code size, due
to the padding.
This is quite annoying with the Allwinner SPLs, which are quite tight.
On the H6 it seems like most code additions lead to a build break at the
moment due to this, which needs fixing. Actually it should affect all
ARMv8 boards, but it might just not be critical for most of them.
I was wondering if we can tell the linker in the (SPL) linker script to
drop code into *two* possible regions, so that we can use a fixed
location for the vector table somewhere in the middle, and tell the
linker to fill up the space before *and* after that at will, without
requiring us to specify the exact link order of code.
I can *manually* arrange the code to make best use of the space, but
this is very fragile and breaks every so often, and is thus not sustainable.
Another idea would be to put the exception table at the end of the image
(at least for sunxi), then fill the remaining <1KB with some data. But I
didn't find a low hanging fruit data block which fills the gap nicely.
If anyone has any ideas on how to overcome this, I would be very grateful
to hear about it.
Cheers,
Andre.
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