On 2/14/19 8:50 AM, Ooi, Joyce wrote: [...] >>>> CCing Chee, he's been working on the altera FPGA code recently, I >>>> hope he can give you some hints. We might need a new API for this, >>>> possibly add DM support to FPGA framework (should be easy) and then >>>> let the FPGA framework handle the bridges and stuff. Really, this >>>> shouldn't be >> in the network code. >>> >>> Since this isn't related to FPGA drivers, I think it's better to have >>> a separate driver for the bridge. I can create a bridge driver, >>> perhaps a new drivers/bridge/*. It'll consist of a uclass driver, >>> which has new APIs to enable bridge, disable bridge, and check for >>> bridge status. The bridge enablement will be based on device tree >>> setting and utilizes reset manager APIs. I'll also create a bridge-socfpga >>> driver >> that implements the bridge enablement. >>> >>> With this, the appropriate bridge will be enabled when the bridge driver is >> loaded. >>> >>> What do you think? >> Can we model this so the framework looks similar to Linux FPGA manager ? > Do you mean this FPGA bridge driver in Linux: > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/fpga/fpga-bridge.c > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/fpga/altera-hps2fpga.c > > I can port over or model the FPGA bridge driver similar to the one in Linux > kernel.
Yes please. -- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
