From: Laurentiu Tudor <laurentiu.tu...@nxp.com>

Certain PCI scenarios have more dynamic requirements, e.g. endpoints
are "hot-plugged" later in the system lifetime. Add a Kconfig option
that allows specifying a maximum number of end-points, per PCI controller
and allocate a StreamID for each one.

Signed-off-by: Laurentiu Tudor <laurentiu.tu...@nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 28 +++++++++++++++++
 drivers/pci/pcie_layerscape_fixup.c       | 38 +++++++++++++++++++++++
 2 files changed, 66 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 2b086da79b..1d633d71a8 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -571,3 +571,31 @@ config TFABOOT
        help
          Enabling this will make a U-Boot binary that is capable of being
          booted via TFA.
+
+menuconfig FSL_PCIE_STATIC_STREAM_IDS
+       bool "Allocate PCI streamIDs statically"
+       default n
+       depends on PCIE_LAYERSCAPE
+       help
+         Statically allocate a certain number of StreamIDs for each PCI
+         controller, instead of enumerating the connected endpoints and
+         allocate a StreamID for each one. This allocation method can
+         be used in more dynamic PCI scenarios, e.g. where endpoints are
+         "hot-plugged" later in the system bringup, by statically specifying
+         a maximum number of StreamIDs expected for each PCI controller.
+
+if FSL_PCIE_STATIC_STREAM_IDS
+
+config FSL_PCIE1_STREAM_IDS_COUNT
+       default 3
+       int "Maximum number of streamIDs to allocate for PCI1 controller"
+
+config FSL_PCIE2_STREAM_IDS_COUNT
+       default 3
+       int "Maximum number of streamIDs to allocate for PCI2 controller"
+
+config FSL_PCIE3_STREAM_IDS_COUNT
+       default 3
+       int "Maximum number of streamIDs to allocate for PCI3 controller"
+
+endif
diff --git a/drivers/pci/pcie_layerscape_fixup.c 
b/drivers/pci/pcie_layerscape_fixup.c
index 1a17bd98aa..32355cbf2e 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -177,6 +177,7 @@ static void fdt_pcie_set_iommu_map_entry(void *blob, struct 
ls_pcie *pcie,
 
 static void fdt_fixup_pcie(void *blob)
 {
+#if !CONFIG_FSL_PCIE_STATIC_STREAM_IDS
        struct udevice *dev, *bus;
        struct ls_pcie *pcie;
        int streamid;
@@ -215,6 +216,43 @@ static void fdt_fixup_pcie(void *blob)
                fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8,
                                             streamid);
        }
+#else
+       static const int streamid_cnt[] = {
+               CONFIG_FSL_PCIE1_STREAM_IDS_COUNT,
+               CONFIG_FSL_PCIE2_STREAM_IDS_COUNT,
+               CONFIG_FSL_PCIE3_STREAM_IDS_COUNT
+       };
+       struct ls_pcie *pcie;
+       int i, streamid, index;
+       pci_dev_t bdf;
+
+       list_for_each_entry(pcie, &ls_pcie_list, list) {
+               for (i = 0; i < streamid_cnt[pcie->idx]; i++) {
+                       streamid = ls_pcie_next_streamid();
+                       if (streamid < 0) {
+                               debug("ERROR: no stream ids free\n");
+                               continue;
+                       }
+
+                       index = ls_pcie_next_lut_index(pcie);
+                       if (index < 0) {
+                               debug("ERROR: no LUT indexes free\n");
+                               continue;
+                       }
+
+                       bdf = PCI_BDF(i, 0, 0);
+                       /* map PCI b.d.f to streamID in LUT */
+                       ls_pcie_lut_set_mapping(pcie, index, bdf >> 8,
+                                               streamid);
+                       /* update msi-map in device tree */
+                       fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8,
+                                                  streamid);
+                       /* update iommu-map in device tree */
+                       fdt_pcie_set_iommu_map_entry(blob, pcie, bdf >> 8,
+                                                    streamid);
+               }
+       }
+#endif /* !CONFIG_FSL_PCIE_STATIC_STREAM_IDS */
 }
 #endif
 
-- 
2.17.1

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