On 23/01/19 12:26 AM, Tom Rini wrote: > On Tue, Jan 22, 2019 at 08:33:55PM +0530, Vignesh R wrote: > >> From: Grygorii Strashko <grygorii.stras...@ti.com> >> >> The Ring Accelerator (RINGACC or RA) provides hardware acceleration to >> enable straightforward passing of work between a producer and a consumer. >> There is one RINGACC module per NAVSS on TI AM65x SoCs. >> >> The RINGACC converts constant-address read and write accesses to equivalent >> read or write accesses to a circular data structure in memory. The RINGACC >> eliminates the need for each DMA controller which needs to access ring >> elements from having to know the current state of the ring (base address, >> current offset). The DMA controller performs a read or write access to a >> specific address range (which maps to the source interface on the RINGACC) >> and the RINGACC replaces the address for the transaction with a new address >> which corresponds to the head or tail element of the ring (head for reads, >> tail for writes). Since the RINGACC maintains the state, multiple DMA >> controllers or channels are allowed to coherently share the same rings as >> applicable. The RINGACC is able to place data which is destined towards >> software into cached memory directly. >> >> Supported ring modes: >> - Ring Mode >> - Messaging Mode >> - Credentials Mode >> - Queue Manager Mode >> >> Signed-off-by: Grygorii Strashko <grygorii.stras...@ti.com> >> Signed-off-by: Vignesh R <vigne...@ti.com> > > The code is fine, so: > Reviewed-by: Tom Rini <tr...@konsulko.com> > > And after checking in Linux real quick, a follow-up to move the TI > Keystone code from drivers/soc/keystone to drivers/soc/ti/ would be good > for overall consistency. I see why this new stuff is under > drivers/soc/ti/ so we should move the other keystone stuff over to > follow. >
I will do that as part of next version. -- Regards Vignesh _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
