> > On Tue, 20 Apr 2010 10:36:08 +0200, Peter Vollmer > <pvollmer-u-b...@innominate.com> wrote: > > > > I then inserted 8 pairs of lwzu/stwu inside the loop to see when exactly > > the problem occurs: > > > > 1: lwzu r0,4(r8) > > stwu r0,4(r7) > > lwzu r0,4(r8) > > stwu r0,4(r7) > > ... > > lwzu r0,4(r8) > > stwu r0,4(r7) > > bdnz 1b > > > > and the last breakpoint location that would get hit is after 6 times of > > lwzu/stwu. > > Further testing showed that after 7 consecutive stwu r0,4(r7) instructions > alone the problem already occurs, i.e. it seems to have nothing to do with > the local bus controller, but with DDR RAM access, right ?
Probably a BDI2000 issue. If memory serves right BDI2000 flushes the cache when it hits a BP. Try this addin this to your BDI .cfg file: TSZ4 0xe6000000 0xe60001100 ; init stack space for cache ; needs a 'sap 0' in BDI Then reboot BDI 2000, telnet to it and enter "sap 0" at the cmd prompt. Start debugging. Don't ask me what it does though. I got this tip long time ago from Abatron Jocke _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
