Reported-by: Siarhei Siamashka <siarhei.siamas...@gmail.com>
Signed-off-by: Guillaume GARDET <guillaume.gar...@free.fr>
Cc: Albert Aribaud <albert.u.b...@aribaud.net>
Cc: Minkyu Kang <mk7.k...@samsung.com>
Cc: Tom Rini <tr...@konsulko.com>
---
arch/arm/mach-exynos/include/mach/system.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/system.h
b/arch/arm/mach-exynos/include/mach/system.h
index 81fa9800b4..48f13c7648 100644
--- a/arch/arm/mach-exynos/include/mach/system.h
+++ b/arch/arm/mach-exynos/include/mach/system.h
@@ -58,8 +58,7 @@ struct exynos5_sysreg {
/* Move 0xd3 value to CPSR register to enable SVC mode */
#define svc32_mode_en() __asm__ __volatile__ \
("@ I&F disable, Mode: 0x13 - SVC\n\t" \
- "mov r0, #0x13|0xC0\n\t" \
- "msr cpsr_c, r0\n\t" : : )
+ "msr cpsr_c, %0\n\t" : : "r"(0x13|0xC0))
/* Set program counter with the given value */
#define set_pc(x) __asm__ __volatile__ ("mov pc, %0\n\t" : : "r"(x))
--
2.20.1
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