On Tue, Nov 20, 2018 at 06:18:07PM +0800, ub...@andestech.com wrote: > Hi Tom, > > Please pull the following patch from u-boot-riscv into your tree. > Thanks! > > The following changes since commit d73d81fd85e4a030ade42c4b2d13466d45090aa3: > > Merge tag 'mips-pull-2018-11-18' of git://git.denx.de/u-boot-mips > (2018-11-18 15:47:16 -0500) > > are available in the Git repository at: > > git://git.denx.de/u-boot-riscv.git > > for you to fetch changes up to f1b8761952aca2cdd91f42dbfd26c656072f2d11: > > riscv: ax25-ae350: Pass dtb address to u-boot with a1 register (2018-11-20 > 14:37:31 +0800) > > ---------------------------------------------------------------- > Bin Meng (1): > Drop CONFIG_INIT_CRITICAL > > Lukas Auer (26): > tools: .gitignore: add prelink-riscv > dts: riscv: update makefile to also clean the RISC-V dts directory > riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I > riscv: select CONFIG_PHYS_64BIT on RV64I systems > riscv: add Kconfig entries for the C and A ISA extensions > riscv: set -march and -mabi based on the Kconfig configuration > riscv: fix use of incorrectly sized variables > riscv: make use of the barrier functions from Linux > riscv: do not reimplement generic io functions > riscv: complete the list of exception codes > riscv: treat undefined exception codes as reserved > riscv: hang on unhandled exceptions > riscv: implement the invalidate_icache_* functions > riscv: fix inconsistent use of spaces and tabs in start.S > riscv: align mtvec on a 4-byte boundary > riscv: remove unused labels in start.S > riscv: do not blindly modify the mstatus CSR > riscv: save hart ID and device tree passed by prior boot stage > riscv: qemu: use device tree passed by prior boot stage > riscv: qemu: support booting Linux > riscv: align bootm implementation with that of other architectures > distro_bootcmd: add VirtIO distro boot command > riscv: qemu: enable distro boot > dm: core: add missing prototype for ofnode_read_u64 > riscv: qemu: detect and boot the kernel passed by QEMU > riscv: qemu: clear kernel-start/-end in device tree as workaround for > BBL > > Rick Chen (7): > riscv: enable -fdata-sections > riscv: dts: Sync to Linux Kernel ae350 dts. > configs: ax25-ae350: Separate ax25-ae350 for RV32/64I. > riscv: dts: Add ae350_32.dts for RV32I > configs: ax25-ae350: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO > riscv: cache: Implement i/dcache [status, enable, disable] > riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
Since it seems like there's a lot of relevant feedback on this specific PR I'm going to wait for that to be addressed or (I suspect more likely) a new PR to be sent, thanks! -- Tom
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