This board has not been converted to CONFIG_DM_BLK by the deadline.
Remove it.
Signed-off-by: Simon Glass <s...@chromium.org>
---
arch/arm/mach-omap2/omap3/Kconfig | 1 -
board/logicpd/omap3som/Kconfig | 14 --
board/logicpd/omap3som/MAINTAINERS | 9 -
board/logicpd/omap3som/Makefile | 6 -
board/logicpd/omap3som/README | 56 -----
board/logicpd/omap3som/omap3logic.c | 329 ---------------------------
board/logicpd/omap3som/omap3logic.h | 236 -------------------
configs/omap35_logic_defconfig | 72 ------
configs/omap35_logic_somlv_defconfig | 78 -------
configs/omap3_logic_defconfig | 73 ------
configs/omap3_logic_somlv_defconfig | 78 -------
include/configs/omap3_logic.h | 210 -----------------
12 files changed, 1162 deletions(-)
delete mode 100644 board/logicpd/omap3som/Kconfig
delete mode 100644 board/logicpd/omap3som/MAINTAINERS
delete mode 100644 board/logicpd/omap3som/Makefile
delete mode 100644 board/logicpd/omap3som/README
delete mode 100644 board/logicpd/omap3som/omap3logic.c
delete mode 100644 board/logicpd/omap3som/omap3logic.h
delete mode 100644 configs/omap35_logic_defconfig
delete mode 100644 configs/omap35_logic_somlv_defconfig
delete mode 100644 configs/omap3_logic_defconfig
delete mode 100644 configs/omap3_logic_somlv_defconfig
delete mode 100644 include/configs/omap3_logic.h
diff --git a/arch/arm/mach-omap2/omap3/Kconfig
b/arch/arm/mach-omap2/omap3/Kconfig
index edd5e3f255b..6e3942ad2d3 100644
--- a/arch/arm/mach-omap2/omap3/Kconfig
+++ b/arch/arm/mach-omap2/omap3/Kconfig
@@ -203,7 +203,6 @@ source "board/ti/am3517crane/Kconfig"
source "board/8dtech/eco5pk/Kconfig"
source "board/corscience/tricorder/Kconfig"
source "board/htkw/mcx/Kconfig"
-source "board/logicpd/omap3som/Kconfig"
source "board/nokia/rx51/Kconfig"
source "board/technexion/tao3530/Kconfig"
source "board/technexion/twister/Kconfig"
diff --git a/board/logicpd/omap3som/Kconfig b/board/logicpd/omap3som/Kconfig
deleted file mode 100644
index 68d40dcd62d..00000000000
--- a/board/logicpd/omap3som/Kconfig
+++ /dev/null
@@ -1,14 +0,0 @@
-if TARGET_OMAP3_LOGIC
-
-config SYS_BOARD
- default "omap3som"
-
-config SYS_VENDOR
- default "logicpd"
-
-config SYS_CONFIG_NAME
- default "omap3_logic"
-
-source "board/ti/common/Kconfig"
-
-endif
diff --git a/board/logicpd/omap3som/MAINTAINERS
b/board/logicpd/omap3som/MAINTAINERS
deleted file mode 100644
index 459393cf54c..00000000000
--- a/board/logicpd/omap3som/MAINTAINERS
+++ /dev/null
@@ -1,9 +0,0 @@
-OMAP3SOM BOARD
-M: Adam Ford <aford...@gmail.com>
-S: Maintained
-F: board/logicpd/omap3som/
-F: include/configs/omap3_logic.h
-F: configs/omap3_logic_defconfig
-F: configs/omap35_logic_defconfig
-F: configs/omap35_logic_somlv_defconfig
-F: configs/omap3_logic_somlv_defconfig
diff --git a/board/logicpd/omap3som/Makefile b/board/logicpd/omap3som/Makefile
deleted file mode 100644
index 61ef14e87a0..00000000000
--- a/board/logicpd/omap3som/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000, 2001, 2002
-# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
-
-obj-y := omap3logic.o
diff --git a/board/logicpd/omap3som/README b/board/logicpd/omap3som/README
deleted file mode 100644
index 5aaf58f0a69..00000000000
--- a/board/logicpd/omap3som/README
+++ /dev/null
@@ -1,56 +0,0 @@
-Summary
-=======
-
-The source for omap3logic.c encompases the OMAP35 and DM3730 SOM-LV and DM3730
Torpedo platforms, but there are device trees custom taylored to each board.
-
-omap3_logic_defconfig = DM37 Torpedo / Torpedo + Wireless
-omap35_logic_defconfig = OMAP35 Torpedo
-omap3_logic_somlv_defconfig = DM37 SOM-LV
-omap35_logic_somlv_defconfig = OMAP35 SOM-LV
-
-The device tree included with each of the defconfig files will also direct the
board as to which dtb file to load when loading the kernel, so it is not
-recomended to mix and match the defconfig files.
-
-Falcon Mode: FAT SD cards
-=========================
-
-In this case the additional file is written to the filesystem. In this
-example we assume that the uImage and device tree to be used are already on
-the FAT filesystem (only the uImage MUST be for this to function
-afterwards) along with a Falcon Mode aware MLO and the FAT partition has
-already been created and marked bootable:
-
-U-Boot # mmc rescan
-# Load kernel and device tree into memory, perform export
-U-Boot # fatload mmc 0 ${loadaddr} uImage
-U-Boot # run loadfdt
-U-Boot # setenv optargs quiet
-U-Boot # run mmcargs
-U-Boot # run common_bootargs
-U-Boot # spl export fdt ${loadaddr} - ${fdtaddr}
-
-This will print a number of lines and then end with something like:
- Loading Device Tree to 8dec9000, end 8dee0295 ... OK
-
-So then note the starting address and write the args to mmc/sd:
-
-U-Boot # fatwrite mmc 0:1 0x8dec9000 args 0x20000
-
-The size of 0x20000 matches the CMD_SPL_WRITE_SIZE.
-
-Falcon Mode: NAND
-=================
-
-In this case the additional data is written to another partition of the
-NAND. In this example we assume that the uImage and device tree to be are
-already located on the NAND somewhere (such as filesystem or mtd partition)
-along with a Falcon Mode aware MLO written to the correct locations for
-booting and mtdparts have been configured correctly for the board:
-
-U-Boot # nand read ${loadaddr} kernel
-U-Boot # load nand rootfs ${fdtaddr} /boot/am335x-evm.dtb
-U-Boot # run nandargs
-U-Boot # run common_bootargs
-U-Boot # spl export fdt ${loadaddr} - ${fdtaddr}
-U-Boot # nand erase.part u-boot-spl-os
-U-Boot # nand write ${fdtaddr} u-boot-spl-os
diff --git a/board/logicpd/omap3som/omap3logic.c
b/board/logicpd/omap3som/omap3logic.c
deleted file mode 100644
index 691d38fdf27..00000000000
--- a/board/logicpd/omap3som/omap3logic.c
+++ /dev/null
@@ -1,329 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2011
- * Logic Product Development <www.logicpd.com>
- *
- * Author :
- * Peter Barada <peter.bar...@logicpd.com>
- *
- * Derived from Beagle Board and 3430 SDP code by
- * Richard Woodruff <r-woodru...@ti.com>
- * Syed Mohammed Khasim <kha...@ti.com>
- */
-#include <common.h>
-#include <dm.h>
-#include <ns16550.h>
-#include <netdev.h>
-#include <flash.h>
-#include <nand.h>
-#include <i2c.h>
-#include <twl4030.h>
-#include <asm/io.h>
-#include <asm/arch/mmc_host_def.h>
-#include <asm/arch/mux.h>
-#include <asm/arch/mem.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/gpio.h>
-#include <asm/omap_mmc.h>
-#include <asm/mach-types.h>
-#include <linux/mtd/rawnand.h>
-#include <asm/omap_musb.h>
-#include <linux/errno.h>
-#include <linux/usb/ch9.h>
-#include <linux/usb/gadget.h>
-#include <linux/usb/musb.h>
-#include "omap3logic.h"
-#ifdef CONFIG_USB_EHCI_HCD
-#include <usb.h>
-#include <asm/ehci-omap.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG1 0x00011203
-#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG2 0x000A1302
-#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG3 0x000F1302
-#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG4 0x0A021303
-#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG5 0x00120F18
-#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG6 0x0A030000
-#define LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG7 0x00000C50
-
-#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG1 0x00011203
-#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG2 0x00091102
-#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG3 0x000D1102
-#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG4 0x09021103
-#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG5 0x00100D15
-#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG6 0x09030000
-#define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG7 0x00000C50
-
-/* This is only needed until SPL gets OF support */
-#ifdef CONFIG_SPL_BUILD
-static const struct ns16550_platdata omap3logic_serial = {
- .base = OMAP34XX_UART1,
- .reg_shift = 2,
- .clock = V_NS16550_CLK,
- .fcr = UART_FCR_DEFVAL,
-};
-
-U_BOOT_DEVICE(omap3logic_uart) = {
- "omap_serial",
- &omap3logic_serial
-};
-
-static const struct omap_hsmmc_plat omap3_logic_mmc0_platdata = {
- .base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE,
- .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_4BIT,
- .cfg.f_min = 400000,
- .cfg.f_max = 52000000,
- .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195,
- .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
-};
-
-U_BOOT_DEVICE(omap3_logic_mmc0) = {
- .name = "omap_hsmmc",
- .platdata = &omap3_logic_mmc0_platdata,
-};
-
-#endif
-
-#ifdef CONFIG_SPL_OS_BOOT
-int spl_start_uboot(void)
-{
- /* break into full u-boot on 'c' */
- return serial_tstc() && serial_getc() == 'c';
-}
-#endif
-
-#if defined(CONFIG_SPL_BUILD)
-/*
- * Routine: get_board_mem_timings
- * Description: If we use SPL then there is no x-loader nor config header
- * so we have to setup the DDR timings ourself on the first bank. This
- * provides the timing values back to the function that configures
- * the memory.
- */
-void get_board_mem_timings(struct board_sdrc_timings *timings)
-{
- timings->mr = MICRON_V_MR_165;
-
- if (get_cpu_family() == CPU_OMAP36XX) {
- /* 200 MHz works for OMAP36/DM37 */
- /* 256MB DDR */
- timings->mcfg = MICRON_V_MCFG_200(256 << 20);
- timings->ctrla = MICRON_V_ACTIMA_200;
- timings->ctrlb = MICRON_V_ACTIMB_200;
- timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
- } else {
- /* 165 MHz works for OMAP35 */
- timings->mcfg = MICRON_V_MCFG_165(256 << 20);
- timings->ctrla = MICRON_V_ACTIMA_165;
- timings->ctrlb = MICRON_V_ACTIMB_165;
- timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
- }
-}
-
-#define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE + 0x7c)
-#define GPMC_NAND_DATA_0 (OMAP34XX_GPMC_BASE + 0x84)
-#define GPMC_NAND_ADDRESS_0 (OMAP34XX_GPMC_BASE + 0x80)
-
-void spl_board_prepare_for_linux(void)
-{
- /* The Micron NAND starts locked which
- * prohibits mounting the NAND as RW
- * The following commands are what unlocks
- * the NAND to become RW Falcon Mode does not
- * have as many smarts as U-Boot, but Logic PD
- * only makes NAND with 512MB so these hard coded
- * values should work for all current models
- */
-
- writeb(0x70, GPMC_NAND_COMMAND_0);
- writeb(-1, GPMC_NAND_DATA_0);
- writeb(0x7a, GPMC_NAND_COMMAND_0);
- writeb(0x00, GPMC_NAND_ADDRESS_0);
- writeb(0x00, GPMC_NAND_ADDRESS_0);
- writeb(0x00, GPMC_NAND_ADDRESS_0);
- writeb(-1, GPMC_NAND_COMMAND_0);
-
- /* Begin address 0 */
- writeb(NAND_CMD_UNLOCK1, 0x6e00007c);
- writeb(0x00, GPMC_NAND_ADDRESS_0);
- writeb(0x00, GPMC_NAND_ADDRESS_0);
- writeb(0x00, GPMC_NAND_ADDRESS_0);
- writeb(-1, GPMC_NAND_DATA_0);
-
- /* Ending address at the end of Flash */
- writeb(NAND_CMD_UNLOCK2, GPMC_NAND_COMMAND_0);
- writeb(0xc0, GPMC_NAND_ADDRESS_0);
- writeb(0xff, GPMC_NAND_ADDRESS_0);
- writeb(0x03, GPMC_NAND_ADDRESS_0);
- writeb(-1, GPMC_NAND_DATA_0);
- writeb(0x79, GPMC_NAND_COMMAND_0);
- writeb(-1, GPMC_NAND_DATA_0);
- writeb(-1, GPMC_NAND_DATA_0);
-}
-#endif
-
-#if !CONFIG_IS_ENABLED(DM_USB)
-#ifdef CONFIG_USB_MUSB_OMAP2PLUS
-static struct musb_hdrc_config musb_config = {
- .multipoint = 1,
- .dyn_fifo = 1,
- .num_eps = 16,
- .ram_bits = 12,
-};
-
-static struct omap_musb_board_data musb_board_data = {
- .interface_type = MUSB_INTERFACE_ULPI,
-};
-
-static struct musb_hdrc_platform_data musb_plat = {
-#if defined(CONFIG_USB_MUSB_HOST)
- .mode = MUSB_HOST,
-#elif defined(CONFIG_USB_MUSB_GADGET)
- .mode = MUSB_PERIPHERAL,
-#else
-#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
-#endif
- .config = &musb_config,
- .power = 100,
- .platform_ops = &omap2430_ops,
- .board_data = &musb_board_data,
-};
-#endif
-
-#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
-/* Call usb_stop() before starting the kernel */
-void show_boot_progress(int val)
-{
- if (val == BOOTSTAGE_ID_RUN_OS)
- usb_stop();
-}
-
-static struct omap_usbhs_board_data usbhs_bdata = {
- .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
- .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
- .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
-};
-
-int ehci_hcd_init(int index, enum usb_init_type init,
- struct ehci_hccr **hccr, struct ehci_hcor **hcor)
-{
- return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
-}
-
-int ehci_hcd_stop(int index)
-{
- return omap_ehci_hcd_stop();
-}
-
-#endif /* CONFIG_USB_EHCI_HCD */
-#endif /* !DM_USB*/
-/*
- * Routine: misc_init_r
- * Description: Configure board specific parts
- */
-int misc_init_r(void)
-{
- twl4030_power_init();
- omap_die_id_display();
-
-#if !CONFIG_IS_ENABLED(DM_USB)
-#ifdef CONFIG_USB_MUSB_OMAP2PLUS
- musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
-#endif
-#endif
- return 0;
-}
-
-#if defined(CONFIG_FLASH_CFI_DRIVER)
-static const u32 gpmc_dm37_c2nor_config[] = {
- LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG1,
- LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG2,
- LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG3,
- LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG4,
- LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG5,
- LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG6,
- LOGIC_MT28_DM37_ASYNC_GPMC_CONFIG7
-};
-
-static const u32 gpmc_omap35_c2nor_config[] = {
- LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG1,
- LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG2,
- LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG3,
- LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG4,
- LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG5,
- LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG6,
- LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG7
-};
-#endif
-
-/*
- * Routine: board_init
- * Description: Early hardware init.
- */
-int board_init(void)
-{
- gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
-
- /* boot param addr */
- gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
-#if defined(CONFIG_FLASH_CFI_DRIVER)
- if (get_cpu_family() == CPU_OMAP36XX) {
- /* Enable CS2 for NOR Flash */
- enable_gpmc_cs_config(gpmc_dm37_c2nor_config, &gpmc_cfg->cs[2],
- 0x10000000, GPMC_SIZE_64M);
- } else {
- enable_gpmc_cs_config(gpmc_omap35_c2nor_config,
&gpmc_cfg->cs[2],
- 0x10000000, GPMC_SIZE_64M);
- }
-#endif
- return 0;
-}
-
-#ifdef CONFIG_BOARD_LATE_INIT
-
-static void unlock_nand(void)
-{
- int dev = nand_curr_device;
- struct mtd_info *mtd;
-
- mtd = get_nand_dev_by_index(dev);
- nand_unlock(mtd, 0, mtd->size, 0);
-}
-
-int board_late_init(void)
-{
-#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
- unlock_nand();
-#endif
- return 0;
-}
-#endif
-
-#if defined(CONFIG_MMC)
-void board_mmc_power_init(void)
-{
- twl4030_power_mmc_init(0);
-}
-#endif
-
-#ifdef CONFIG_SMC911X
-/* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */
-static const u32 gpmc_lan92xx_config[] = {
- NET_LAN92XX_GPMC_CONFIG1,
- NET_LAN92XX_GPMC_CONFIG2,
- NET_LAN92XX_GPMC_CONFIG3,
- NET_LAN92XX_GPMC_CONFIG4,
- NET_LAN92XX_GPMC_CONFIG5,
- NET_LAN92XX_GPMC_CONFIG6,
-};
-
-int board_eth_init(bd_t *bis)
-{
- enable_gpmc_cs_config(gpmc_lan92xx_config, &gpmc_cfg->cs[1],
- CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
-
- return smc911x_initialize(0, CONFIG_SMC911X_BASE);
-}
-#endif
diff --git a/board/logicpd/omap3som/omap3logic.h
b/board/logicpd/omap3som/omap3logic.h
deleted file mode 100644
index aeb26b90d71..00000000000
--- a/board/logicpd/omap3som/omap3logic.h
+++ /dev/null
@@ -1,236 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2011
- * Logic Product Development <www.logicpd.com>
- *
- * Author:
- * Peter Barada <peter.bar...@logicpd.com>
- */
-#ifndef _OMAP3LOGIC_H_
-#define _OMAP3LOGIC_H_
-
-/*
- * OMAP3 GPMC register settings for CS1 LAN922x
- */
-#define NET_LAN92XX_GPMC_CONFIG1 0x00001000
-#define NET_LAN92XX_GPMC_CONFIG2 0x00080801
-#define NET_LAN92XX_GPMC_CONFIG3 0x00000000
-#define NET_LAN92XX_GPMC_CONFIG4 0x08010801
-#define NET_LAN92XX_GPMC_CONFIG5 0x00080a0a
-#define NET_LAN92XX_GPMC_CONFIG6 0x03000280
-
-
-const omap3_sysinfo sysinfo = {
- DDR_DISCRETE,
- "Logic DM37x/OMAP35x reference board",
- "NAND",
-};
-
-/*
- * IEN - Input Enable
- * IDIS - Input Disable
- * PTD - Pull type Down
- * PTU - Pull type Up
- * DIS - Pull type selection is inactive
- * EN - Pull type selection is active
- * M0 - Mode 0
- * The commented string gives the final mux configuration for that pin
- */
-
-/*
- * Routine: set_muxconf_regs
- * Description: Setting up the configuration Mux registers specific to the
- * hardware. Many pins need to be moved from protect to primary
- * mode.
- */
-void set_muxconf_regs(void)
-{
- MUX_VAL(CP(SDRC_D0), (IEN | PTD | DIS | M0)); /*SDRC_D0*/
- MUX_VAL(CP(SDRC_D1), (IEN | PTD | DIS | M0)); /*SDRC_D1*/
- MUX_VAL(CP(SDRC_D2), (IEN | PTD | DIS | M0)); /*SDRC_D2*/
- MUX_VAL(CP(SDRC_D3), (IEN | PTD | DIS | M0)); /*SDRC_D3*/
- MUX_VAL(CP(SDRC_D4), (IEN | PTD | DIS | M0)); /*SDRC_D4*/
- MUX_VAL(CP(SDRC_D5), (IEN | PTD | DIS | M0)); /*SDRC_D5*/
- MUX_VAL(CP(SDRC_D6), (IEN | PTD | DIS | M0)); /*SDRC_D6*/
- MUX_VAL(CP(SDRC_D7), (IEN | PTD | DIS | M0)); /*SDRC_D7*/
- MUX_VAL(CP(SDRC_D8), (IEN | PTD | DIS | M0)); /*SDRC_D8*/
- MUX_VAL(CP(SDRC_D9), (IEN | PTD | DIS | M0)); /*SDRC_D9*/
- MUX_VAL(CP(SDRC_D10), (IEN | PTD | DIS | M0)); /*SDRC_D10*/
- MUX_VAL(CP(SDRC_D11), (IEN | PTD | DIS | M0)); /*SDRC_D11*/
- MUX_VAL(CP(SDRC_D12), (IEN | PTD | DIS | M0)); /*SDRC_D12*/
- MUX_VAL(CP(SDRC_D13), (IEN | PTD | DIS | M0)); /*SDRC_D13*/
- MUX_VAL(CP(SDRC_D14), (IEN | PTD | DIS | M0)); /*SDRC_D14*/
- MUX_VAL(CP(SDRC_D15), (IEN | PTD | DIS | M0)); /*SDRC_D15*/
- MUX_VAL(CP(SDRC_D16), (IEN | PTD | DIS | M0)); /*SDRC_D16*/
- MUX_VAL(CP(SDRC_D17), (IEN | PTD | DIS | M0)); /*SDRC_D17*/
- MUX_VAL(CP(SDRC_D18), (IEN | PTD | DIS | M0)); /*SDRC_D18*/
- MUX_VAL(CP(SDRC_D19), (IEN | PTD | DIS | M0)); /*SDRC_D19*/
- MUX_VAL(CP(SDRC_D20), (IEN | PTD | DIS | M0)); /*SDRC_D20*/
- MUX_VAL(CP(SDRC_D21), (IEN | PTD | DIS | M0)); /*SDRC_D21*/
- MUX_VAL(CP(SDRC_D22), (IEN | PTD | DIS | M0)); /*SDRC_D22*/
- MUX_VAL(CP(SDRC_D23), (IEN | PTD | DIS | M0)); /*SDRC_D23*/
- MUX_VAL(CP(SDRC_D24), (IEN | PTD | DIS | M0)); /*SDRC_D24*/
- MUX_VAL(CP(SDRC_D25), (IEN | PTD | DIS | M0)); /*SDRC_D25*/
- MUX_VAL(CP(SDRC_D26), (IEN | PTD | DIS | M0)); /*SDRC_D26*/
- MUX_VAL(CP(SDRC_D27), (IEN | PTD | DIS | M0)); /*SDRC_D27*/
- MUX_VAL(CP(SDRC_D28), (IEN | PTD | DIS | M0)); /*SDRC_D28*/
- MUX_VAL(CP(SDRC_D29), (IEN | PTD | DIS | M0)); /*SDRC_D29*/
- MUX_VAL(CP(SDRC_D30), (IEN | PTD | DIS | M0)); /*SDRC_D30*/
- MUX_VAL(CP(SDRC_D31), (IEN | PTD | DIS | M0)); /*SDRC_D31*/
- MUX_VAL(CP(SDRC_CLK), (IEN | PTD | DIS | M0)); /*SDRC_CLK*/
- MUX_VAL(CP(SDRC_DQS0), (IEN | PTD | DIS | M0)); /*SDRC_DQS0*/
- MUX_VAL(CP(SDRC_DQS1), (IEN | PTD | DIS | M0)); /*SDRC_DQS1*/
- MUX_VAL(CP(SDRC_DQS2), (IEN | PTD | DIS | M0)); /*SDRC_DQS2*/
- MUX_VAL(CP(SDRC_DQS3), (IEN | PTD | DIS | M0)); /*SDRC_DQS3*/
- MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); /*SDRC_CKE0*/
- MUX_VAL(CP(SDRC_CKE1), (IDIS | PTU | DIS | M0)); /*SDRC_CKE1*/
-
- MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); /*GPMC_A1*/
- MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); /*GPMC_A2*/
- MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)); /*GPMC_A3*/
- MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)); /*GPMC_A4*/
- MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)); /*GPMC_A5*/
- MUX_VAL(CP(GPMC_A6), (IDIS | PTU | EN | M0)); /*GPMC_A6*/
- MUX_VAL(CP(GPMC_A7), (IDIS | PTU | EN | M0)); /*GPMC_A7*/
- MUX_VAL(CP(GPMC_A8), (IDIS | PTU | EN | M0)); /*GPMC_A8*/
- MUX_VAL(CP(GPMC_A9), (IDIS | PTU | EN | M0)); /*GPMC_A9*/
- MUX_VAL(CP(GPMC_A10), (IDIS | PTU | EN | M0)); /*GPMC_A10*/
- MUX_VAL(CP(GPMC_D0), (IEN | PTU | EN | M0)); /*GPMC_D0*/
- MUX_VAL(CP(GPMC_D1), (IEN | PTU | EN | M0)); /*GPMC_D1*/
- MUX_VAL(CP(GPMC_D2), (IEN | PTU | EN | M0)); /*GPMC_D2*/
- MUX_VAL(CP(GPMC_D3), (IEN | PTU | EN | M0)); /*GPMC_D3*/
- MUX_VAL(CP(GPMC_D4), (IEN | PTU | EN | M0)); /*GPMC_D4*/
- MUX_VAL(CP(GPMC_D5), (IEN | PTU | EN | M0)); /*GPMC_D5*/
- MUX_VAL(CP(GPMC_D6), (IEN | PTU | EN | M0)); /*GPMC_D6*/
- MUX_VAL(CP(GPMC_D7), (IEN | PTU | EN | M0)); /*GPMC_D7*/
- MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)); /*GPMC_D8*/
- MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)); /*GPMC_D9*/
- MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)); /*GPMC_D10*/
- MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)); /*GPMC_D11*/
- MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)); /*GPMC_D12*/
- MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)); /*GPMC_D13*/
- MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)); /*GPMC_D14*/
- MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)); /*GPMC_D15*/
- MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)); /*GPMC_nCS0*/
- MUX_VAL(CP(GPMC_NCS1), (IDIS | PTU | EN | M0)); /*GPMC_nCS1*/
- MUX_VAL(CP(GPMC_NCS2), (IDIS | PTU | EN | M0)); /*GPMC_nCS2*/
- MUX_VAL(CP(GPMC_NCS3), (IDIS | PTU | EN | M0)); /*GPMC_nCS3*/
- MUX_VAL(CP(GPMC_NCS4), (IEN | PTU | EN | M0)); /*GPMC_nCS4*/
- MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | EN | M0)); /*GPMC_nCS5*/
- MUX_VAL(CP(GPMC_NCS6), (IEN | PTU | EN | M0)); /*GPMC_nCS6*/
- MUX_VAL(CP(GPMC_NCS7), (IEN | PTU | EN | M0)); /*GPMC_nCS7*/
- MUX_VAL(CP(GPMC_CLK), (IDIS | PTU | EN | M0)); /*GPMC_CLK*/
- MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)); /*GPMC_nADV_ALE*/
- MUX_VAL(CP(GPMC_NOE), (IDIS | PTD | DIS | M0)); /*GPMC_nOE*/
- MUX_VAL(CP(GPMC_NWE), (IDIS | PTD | DIS | M0)); /*GPMC_nWE*/
- MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)); /*GPMC_nBE0_CLE*/
- MUX_VAL(CP(GPMC_NBE1), (IEN | PTU | EN | M0)); /*GPMC_nBE1*/
- MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)); /*GPMC_nWP*/
- MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)); /*GPMC_WAIT0*/
- MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)); /*GPMC_WAIT1*/
- MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)); /*GPIO_64*/
- MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)); /*GPMC_WAIT3*/
-
- MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)); /*MMC1_CLK*/
- MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)); /*MMC1_CMD*/
- MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)); /*MMC1_DAT0*/
- MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)); /*MMC1_DAT1*/
- MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); /*MMC1_DAT2*/
- MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); /*MMC1_DAT3*/
-
- MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)); /*UART1_TX*/
- MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)); /*UART1_RTS*/
- MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)); /*UART1_CTS*/
- MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)); /*UART1_RX*/
-
- MUX_VAL(CP(JTAG_TCK), (IEN | PTD | DIS | M0)); /*JTAG_TCK*/
- MUX_VAL(CP(JTAG_TMS), (IEN | PTD | DIS | M0)); /*JTAG_TMS*/
- MUX_VAL(CP(JTAG_TDI), (IEN | PTD | DIS | M0)); /*JTAG_TDI*/
- MUX_VAL(CP(JTAG_EMU0), (IEN | PTD | DIS | M0)); /*JTAG_EMU0*/
- MUX_VAL(CP(JTAG_EMU1), (IEN | PTD | DIS | M0)); /*JTAG_EMU1*/
-
- MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M0)); /*ETK_CLK*/
- MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTD | DIS | M0)); /*ETK_CTL*/
- MUX_VAL(CP(ETK_D0_ES2), (IEN | PTD | DIS | M0)); /*ETK_D0*/
- MUX_VAL(CP(ETK_D1_ES2), (IEN | PTD | DIS | M0)); /*ETK_D1*/
- MUX_VAL(CP(ETK_D2_ES2), (IEN | PTD | EN | M0)); /*ETK_D2*/
- MUX_VAL(CP(ETK_D3_ES2), (IEN | PTD | DIS | M0)); /*ETK_D3*/
- MUX_VAL(CP(ETK_D4_ES2), (IEN | PTD | DIS | M0)); /*ETK_D4*/
- MUX_VAL(CP(ETK_D5_ES2), (IEN | PTD | DIS | M0)); /*ETK_D5*/
- MUX_VAL(CP(ETK_D6_ES2), (IEN | PTD | DIS | M0)); /*ETK_D6*/
- MUX_VAL(CP(ETK_D7_ES2), (IEN | PTD | DIS | M0)); /*ETK_D7*/
- MUX_VAL(CP(ETK_D8_ES2), (IEN | PTD | DIS | M0)); /*ETK_D8*/
- MUX_VAL(CP(ETK_D9_ES2), (IEN | PTD | DIS | M0)); /*ETK_D9*/
- MUX_VAL(CP(ETK_D10_ES2), (IEN | PTD | DIS | M0)); /*ETK_D10*/
- MUX_VAL(CP(ETK_D11_ES2), (IEN | PTD | DIS | M0)); /*ETK_D11*/
- MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M0)); /*ETK_D12*/
- MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M0)); /*ETK_D13*/
- MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M0)); /*ETK_D14*/
- MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M0)); /*ETK_D15*/
-
- MUX_VAL(CP(D2D_MCAD1), (IEN | PTD | EN | M0)); /*d2d_mcad1*/
- MUX_VAL(CP(D2D_MCAD2), (IEN | PTD | EN | M0)); /*d2d_mcad2*/
- MUX_VAL(CP(D2D_MCAD3), (IEN | PTD | EN | M0)); /*d2d_mcad3*/
- MUX_VAL(CP(D2D_MCAD4), (IEN | PTD | EN | M0)); /*d2d_mcad4*/
- MUX_VAL(CP(D2D_MCAD5), (IEN | PTD | EN | M0)); /*d2d_mcad5*/
- MUX_VAL(CP(D2D_MCAD6), (IEN | PTD | EN | M0)); /*d2d_mcad6*/
- MUX_VAL(CP(D2D_MCAD7), (IEN | PTD | EN | M0)); /*d2d_mcad7*/
- MUX_VAL(CP(D2D_MCAD8), (IEN | PTD | EN | M0)); /*d2d_mcad8*/
- MUX_VAL(CP(D2D_MCAD9), (IEN | PTD | EN | M0)); /*d2d_mcad9*/
- MUX_VAL(CP(D2D_MCAD10), (IEN | PTD | EN | M0)); /*d2d_mcad10*/
- MUX_VAL(CP(D2D_MCAD11), (IEN | PTD | EN | M0)); /*d2d_mcad11*/
- MUX_VAL(CP(D2D_MCAD12), (IEN | PTD | EN | M0)); /*d2d_mcad12*/
- MUX_VAL(CP(D2D_MCAD13), (IEN | PTD | EN | M0)); /*d2d_mcad13*/
- MUX_VAL(CP(D2D_MCAD14), (IEN | PTD | EN | M0)); /*d2d_mcad14*/
- MUX_VAL(CP(D2D_MCAD15), (IEN | PTD | EN | M0)); /*d2d_mcad15*/
- MUX_VAL(CP(D2D_MCAD16), (IEN | PTD | EN | M0)); /*d2d_mcad16*/
- MUX_VAL(CP(D2D_MCAD17), (IEN | PTD | EN | M0)); /*d2d_mcad17*/
- MUX_VAL(CP(D2D_MCAD18), (IEN | PTD | EN | M0)); /*d2d_mcad18*/
- MUX_VAL(CP(D2D_MCAD19), (IEN | PTD | EN | M0)); /*d2d_mcad19*/
- MUX_VAL(CP(D2D_MCAD20), (IEN | PTD | EN | M0)); /*d2d_mcad20*/
- MUX_VAL(CP(D2D_MCAD21), (IEN | PTD | EN | M0)); /*d2d_mcad21*/
- MUX_VAL(CP(D2D_MCAD22), (IEN | PTD | EN | M0)); /*d2d_mcad22*/
- MUX_VAL(CP(D2D_MCAD23), (IEN | PTD | EN | M0)); /*d2d_mcad23*/
- MUX_VAL(CP(D2D_MCAD24), (IEN | PTD | EN | M0)); /*d2d_mcad24*/
- MUX_VAL(CP(D2D_MCAD25), (IEN | PTD | EN | M0)); /*d2d_mcad25*/
- MUX_VAL(CP(D2D_MCAD26), (IEN | PTD | EN | M0)); /*d2d_mcad26*/
- MUX_VAL(CP(D2D_MCAD27), (IEN | PTD | EN | M0)); /*d2d_mcad27*/
- MUX_VAL(CP(D2D_MCAD28), (IEN | PTD | EN | M0)); /*d2d_mcad28*/
- MUX_VAL(CP(D2D_MCAD29), (IEN | PTD | EN | M0)); /*d2d_mcad29*/
- MUX_VAL(CP(D2D_MCAD30), (IEN | PTD | EN | M0)); /*d2d_mcad30*/
- MUX_VAL(CP(D2D_MCAD31), (IEN | PTD | EN | M0)); /*d2d_mcad31*/
- MUX_VAL(CP(D2D_MCAD32), (IEN | PTD | EN | M0)); /*d2d_mcad32*/
- MUX_VAL(CP(D2D_MCAD33), (IEN | PTD | EN | M0)); /*d2d_mcad33*/
- MUX_VAL(CP(D2D_MCAD34), (IEN | PTD | EN | M0)); /*d2d_mcad34*/
- MUX_VAL(CP(D2D_MCAD35), (IEN | PTD | EN | M0)); /*d2d_mcad35*/
- MUX_VAL(CP(D2D_MCAD36), (IEN | PTD | EN | M0)); /*d2d_mcad36*/
- MUX_VAL(CP(D2D_CLK26MI), (IEN | PTD | DIS | M0)); /*d2d_clk26mi*/
- MUX_VAL(CP(D2D_NRESPWRON), (IEN | PTD | EN | M0)); /*d2d_nrespwron*/
- MUX_VAL(CP(D2D_NRESWARM), (IEN | PTU | EN | M0)); /*d2d_nreswarm */
- MUX_VAL(CP(D2D_ARM9NIRQ), (IEN | PTD | DIS | M0)); /*d2d_arm9nirq */
- MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN | PTD | DIS | M0)); /*d2d_uma2p6fiq*/
- MUX_VAL(CP(D2D_SPINT), (IEN | PTD | EN | M0)); /*d2d_spint*/
- MUX_VAL(CP(D2D_FRINT), (IEN | PTD | EN | M0)); /*d2d_frint*/
- MUX_VAL(CP(D2D_DMAREQ0), (IEN | PTD | DIS | M0)); /*d2d_dmareq0*/
- MUX_VAL(CP(D2D_DMAREQ1), (IEN | PTD | DIS | M0)); /*d2d_dmareq1*/
- MUX_VAL(CP(D2D_DMAREQ2), (IEN | PTD | DIS | M0)); /*d2d_dmareq2*/
- MUX_VAL(CP(D2D_DMAREQ3), (IEN | PTD | DIS | M0)); /*d2d_dmareq3*/
- MUX_VAL(CP(D2D_N3GTRST), (IEN | PTD | DIS | M0)); /*d2d_n3gtrst*/
- MUX_VAL(CP(D2D_N3GTDI), (IEN | PTD | DIS | M0)); /*d2d_n3gtdi*/
- MUX_VAL(CP(D2D_N3GTDO), (IEN | PTD | DIS | M0)); /*d2d_n3gtdo*/
- MUX_VAL(CP(D2D_N3GTMS), (IEN | PTD | DIS | M0)); /*d2d_n3gtms*/
- MUX_VAL(CP(D2D_N3GTCK), (IEN | PTD | DIS | M0)); /*d2d_n3gtck*/
- MUX_VAL(CP(D2D_N3GRTCK), (IEN | PTD | DIS | M0)); /*d2d_n3grtck*/
- MUX_VAL(CP(D2D_MSTDBY), (IEN | PTU | EN | M0)); /*d2d_mstdby*/
- MUX_VAL(CP(D2D_SWAKEUP), (IEN | PTD | EN | M0)); /*d2d_swakeup*/
- MUX_VAL(CP(D2D_IDLEREQ), (IEN | PTD | DIS | M0)); /*d2d_idlereq*/
- MUX_VAL(CP(D2D_IDLEACK), (IEN | PTU | EN | M0)); /*d2d_idleack*/
- MUX_VAL(CP(D2D_MWRITE), (IEN | PTD | DIS | M0)); /*d2d_mwrite*/
- MUX_VAL(CP(D2D_SWRITE), (IEN | PTD | DIS | M0)); /*d2d_swrite*/
- MUX_VAL(CP(D2D_MREAD), (IEN | PTD | DIS | M0)); /*d2d_mread*/
- MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)); /*d2d_sread*/
- MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)); /*d2d_mbusflag*/
- MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)); /*d2d_sbusflag*/
-}
-
-#endif
diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig
deleted file mode 100644
index 80219eeacfa..00000000000
--- a/configs/omap35_logic_defconfig
+++ /dev/null
@@ -1,72 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
-CONFIG_TI_COMMON_CMD_OPTIONS=y
-# CONFIG_SPL_GPIO_SUPPORT is not set
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_TARGET_OMAP3_LOGIC=y
-# CONFIG_SPL_OMAP3_ID_NAND is not set
-CONFIG_SPL=y
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_NR_DRAM_BANKS=2
-# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_MTD_SUPPORT=y
-CONFIG_SPL_OS_BOOT=y
-CONFIG_SYS_PROMPT="OMAP Logic # "
-# CONFIG_CMD_IMI is not set
-CONFIG_CMD_SPL=y
-CONFIG_CMD_SPL_NAND_OFS=0x240000
-CONFIG_CMD_SPL_WRITE_SIZE=0x20000
-# CONFIG_CMD_EEPROM is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_NAND=y
-CONFIG_CMD_NAND_LOCK_UNLOCK=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-os),128k(u-boot-env),6m(kernel),-(fs)"
-CONFIG_CMD_UBI=y
-CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-35xx-devkit"
-# CONFIG_ENV_IS_IN_FAT is not set
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SPL_DM=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x82000000
-CONFIG_DM_I2C=y
-CONFIG_DM_MMC=y
-CONFIG_MMC_OMAP_HS=y
-CONFIG_NAND=y
-CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
-CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
-CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
-CONFIG_SPL_NAND_SIMPLE=y
-CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x08000000
-CONFIG_SMC911X_32_BIT=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_SINGLE=y
-CONFIG_DM_PMIC=y
-# CONFIG_SPL_PMIC_CHILDREN is not set
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPECIFY_CONSOLE_INDEX=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_OMAP3_SPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_OMAP2PLUS=y
-CONFIG_TWL4030_USB=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="TI"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0451
-CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
-CONFIG_USB_ETHER=y
-CONFIG_BCH=y
-# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/configs/omap35_logic_somlv_defconfig
b/configs/omap35_logic_somlv_defconfig
deleted file mode 100644
index 8a8c7147c3a..00000000000
--- a/configs/omap35_logic_somlv_defconfig
+++ /dev/null
@@ -1,78 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
-CONFIG_TI_COMMON_CMD_OPTIONS=y
-# CONFIG_SPL_GPIO_SUPPORT is not set
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_TARGET_OMAP3_LOGIC=y
-# CONFIG_SPL_OMAP3_ID_NAND is not set
-CONFIG_SPL=y
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_NR_DRAM_BANKS=2
-# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_MTD_SUPPORT=y
-CONFIG_SPL_OS_BOOT=y
-CONFIG_SYS_PROMPT="OMAP Logic # "
-# CONFIG_CMD_IMI is not set
-CONFIG_CMD_SPL=y
-CONFIG_CMD_SPL_NAND_OFS=0x240000
-CONFIG_CMD_SPL_WRITE_SIZE=0x20000
-# CONFIG_CMD_EEPROM is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_NAND=y
-CONFIG_CMD_NAND_LOCK_UNLOCK=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0,nor0=physmap-flash.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-os),128k(u-boot-env),6m(kernel),-(fs);physmap-flash.0:-(nor)"
-CONFIG_CMD_UBI=y
-CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-35xx-devkit"
-# CONFIG_ENV_IS_IN_FAT is not set
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SPL_DM=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x82000000
-CONFIG_DM_I2C=y
-CONFIG_DM_MMC=y
-CONFIG_MMC_OMAP_HS=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_FLASH_CFI_MTD=y
-CONFIG_SYS_FLASH_PROTECTION=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
-CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
-CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
-CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
-CONFIG_SPL_NAND_SIMPLE=y
-CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x08000000
-CONFIG_SMC911X_32_BIT=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_SINGLE=y
-CONFIG_DM_PMIC=y
-# CONFIG_SPL_PMIC_CHILDREN is not set
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPECIFY_CONSOLE_INDEX=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_OMAP3_SPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_OMAP2PLUS=y
-CONFIG_TWL4030_USB=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="TI"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0451
-CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
-CONFIG_USB_ETHER=y
-CONFIG_BCH=y
-# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
deleted file mode 100644
index 969387a37cb..00000000000
--- a/configs/omap3_logic_defconfig
+++ /dev/null
@@ -1,73 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
-CONFIG_TI_COMMON_CMD_OPTIONS=y
-# CONFIG_SPL_GPIO_SUPPORT is not set
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_TARGET_OMAP3_LOGIC=y
-# CONFIG_SPL_OMAP3_ID_NAND is not set
-CONFIG_SPL=y
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_NR_DRAM_BANKS=2
-# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_MTD_SUPPORT=y
-CONFIG_SPL_OS_BOOT=y
-CONFIG_SYS_PROMPT="OMAP Logic # "
-# CONFIG_CMD_IMI is not set
-CONFIG_CMD_SPL=y
-CONFIG_CMD_SPL_NAND_OFS=0x240000
-CONFIG_CMD_SPL_WRITE_SIZE=0x20000
-# CONFIG_CMD_EEPROM is not set
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_NAND=y
-CONFIG_CMD_NAND_LOCK_UNLOCK=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-os),128k(u-boot-env),6m(kernel),-(fs)"
-CONFIG_CMD_UBI=y
-CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit"
-# CONFIG_ENV_IS_IN_FAT is not set
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SPL_DM=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x82000000
-CONFIG_DM_I2C=y
-CONFIG_DM_MMC=y
-CONFIG_MMC_OMAP_HS=y
-CONFIG_MMC_OMAP36XX_PINS=y
-CONFIG_NAND=y
-CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
-CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
-CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
-CONFIG_SPL_NAND_SIMPLE=y
-CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x08000000
-CONFIG_SMC911X_32_BIT=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_SINGLE=y
-CONFIG_DM_PMIC=y
-# CONFIG_SPL_PMIC_CHILDREN is not set
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPECIFY_CONSOLE_INDEX=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_OMAP3_SPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_OMAP2PLUS=y
-CONFIG_TWL4030_USB=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="TI"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0451
-CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
-CONFIG_USB_ETHER=y
-CONFIG_BCH=y
-# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/configs/omap3_logic_somlv_defconfig
b/configs/omap3_logic_somlv_defconfig
deleted file mode 100644
index 396543e56bc..00000000000
--- a/configs/omap3_logic_somlv_defconfig
+++ /dev/null
@@ -1,78 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SYS_TEXT_BASE=0x80100000
-CONFIG_TI_COMMON_CMD_OPTIONS=y
-# CONFIG_SPL_GPIO_SUPPORT is not set
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_TARGET_OMAP3_LOGIC=y
-# CONFIG_SPL_OMAP3_ID_NAND is not set
-CONFIG_SPL=y
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_NR_DRAM_BANKS=2
-# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_MTD_SUPPORT=y
-CONFIG_SPL_OS_BOOT=y
-CONFIG_SYS_PROMPT="OMAP Logic # "
-# CONFIG_CMD_IMI is not set
-CONFIG_CMD_SPL=y
-CONFIG_CMD_SPL_NAND_OFS=0x240000
-CONFIG_CMD_SPL_WRITE_SIZE=0x20000
-# CONFIG_CMD_EEPROM is not set
-CONFIG_CMD_NAND=y
-CONFIG_CMD_NAND_LOCK_UNLOCK=y
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0,nor0=physmap-flash.0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1792k(u-boot),128k(spl-os),128k(u-boot-env),6m(kernel),-(fs);physmap-flash.0:-(nor)"
-CONFIG_CMD_UBI=y
-CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-37xx-devkit"
-# CONFIG_ENV_IS_IN_FAT is not set
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SPL_DM=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0x82000000
-CONFIG_DM_I2C=y
-CONFIG_DM_MMC=y
-CONFIG_MMC_OMAP_HS=y
-CONFIG_MMC_OMAP36XX_PINS=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_FLASH_CFI_MTD=y
-CONFIG_SYS_FLASH_PROTECTION=y
-CONFIG_SYS_FLASH_CFI=y
-CONFIG_NAND=y
-CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
-CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
-CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
-CONFIG_SPL_NAND_SIMPLE=y
-CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x08000000
-CONFIG_SMC911X_32_BIT=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_SINGLE=y
-CONFIG_DM_PMIC=y
-# CONFIG_SPL_PMIC_CHILDREN is not set
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPECIFY_CONSOLE_INDEX=y
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_OMAP3_SPI=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_OMAP2PLUS=y
-CONFIG_TWL4030_USB=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="TI"
-CONFIG_USB_GADGET_VENDOR_NUM=0x0451
-CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
-CONFIG_USB_ETHER=y
-CONFIG_BCH=y
-# CONFIG_SPL_OF_LIBFDT is not set
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
deleted file mode 100644
index fe557f91caa..00000000000
--- a/include/configs/omap3_logic.h
+++ /dev/null
@@ -1,210 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
- * Peter Barada <peter.bar...@logicpd.com>
- *
- * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
- * reference boards.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/* High Level Configuration Options */
-
-#include <configs/ti_omap3_common.h>
-
-/*
- * We are only ever GP parts and will utilize all of the "downloaded image"
- * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
- * order to allow for BCH8 to fit in.
- */
-#undef CONFIG_SPL_TEXT_BASE
-#define CONFIG_SPL_TEXT_BASE 0x40200000
-
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
-/* Hardware drivers */
-
-/* I2C */
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
-
-/* Board NAND Info. */
-#ifdef CONFIG_NAND
-#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
- /* NAND devices */
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT 64
-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
-#define CONFIG_SYS_NAND_OOBSIZE 64
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
-#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
- 13, 14, 16, 17, 18, 19, 20, 21, 22, \
- 23, 24, 25, 26, 27, 28, 30, 31, 32, \
- 33, 34, 35, 36, 37, 38, 39, 40, 41, \
- 42, 44, 45, 46, 47, 48, 49, 50, 51, \
- 52, 53, 54, 55, 56}
-
-#define CONFIG_SYS_NAND_ECCSIZE 512
-#define CONFIG_SYS_NAND_ECCBYTES 13
-#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
-#define CONFIG_SYS_NAND_MAX_OOBFREE 2
-#define CONFIG_SYS_NAND_MAX_ECCPOS 56
-#endif
-
-/* Environment information */
-
-#define CONFIG_PREBOOT \
- "setenv preboot;" \
- "saveenv;"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- DEFAULT_LINUX_BOOT_ENV \
- "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
- "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
- "mmcdev=0\0" \
- "mmcroot=/dev/mmcblk0p2 rw\0" \
- "mmcrootfstype=ext4 rootwait\0" \
- "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
- "nandrootfstype=ubifs rootwait\0" \
- "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
- "if run loadbootscript; then " \
- "run bootscript; " \
- "else " \
- "run defaultboot;" \
- "fi; " \
- "else run defaultboot; fi\0" \
- "defaultboot=run mmcramboot\0" \
- "consoledevice=ttyS0\0" \
- "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
- "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
- "rotation=0\0" \
- "vrfb_arg=if itest ${rotation} -ne 0; then " \
- "setenv bootargs ${bootargs} omapfb.vrfb=y " \
- "omapfb.rotate=${rotation}; " \
- "fi\0" \
- "optargs=ignore_loglevel early_printk no_console_suspend\0" \
- "common_bootargs=run setconsole; setenv bootargs " \
- "${bootargs} "\
- "console=${console} " \
- "${mtdparts} "\
- "${optargs}; " \
- "run vrfb_arg\0" \
- "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
- "bootscript=echo 'Running bootscript from mmc ...'; " \
- "source ${loadaddr}\0" \
- "loadimage=mmc rescan; " \
- "load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
- "ramdisksize=64000\0" \
- "ramdiskimage=rootfs.ext2.gz.uboot\0" \
- "loadramdisk=mmc rescan; " \
- "load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \
- "ramargs=setenv bootargs "\
- "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
- "mmcargs=setenv bootargs "\
- "root=${mmcroot} rootfstype=${mmcrootfstype}\0" \
- "nandargs=setenv bootargs "\
- "root=${nandroot} " \
- "rootfstype=${nandrootfstype}\0" \
- "nfsargs=setenv serverip ${tftpserver}; " \
- "setenv bootargs root=/dev/nfs " \
- "nfsroot=${nfsrootpath} " \
-
"ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \
- "nfsrootpath=/opt/nfs-exports/omap\0" \
- "autoload=no\0" \
- "fdtimage=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
- "loadfdt=mmc rescan; " \
- "load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \
- "mmcbootcommon=echo Booting with DT from mmc${mmcdev} ...; " \
- "run mmcargs; " \
- "run common_bootargs; " \
- "run dump_bootargs; " \
- "run loadimage; " \
- "run loadfdt;\0 " \
- "mmcbootz=setenv bootfile zImage; " \
- "run mmcbootcommon; "\
- "bootz ${loadaddr} - ${fdtaddr}\0" \
- "mmcboot=setenv bootfile uImage; "\
- "run mmcbootcommon; "\
- "bootm ${loadaddr} - ${fdtaddr}\0" \
- "mmcrambootcommon=echo 'Booting kernel from MMC w/ramdisk...'; " \
- "run ramargs; " \
- "run common_bootargs; " \
- "run dump_bootargs; " \
- "run loadimage; " \
- "run loadfdt; " \
- "run loadramdisk\0" \
- "mmcramboot=setenv bootfile uImage; " \
- "run mmcrambootcommon; " \
- "bootm ${loadaddr} ${rdaddr} ${fdtaddr}\0" \
- "mmcrambootz=setenv bootfile zImage; " \
- "run mmcrambootcommon; " \
- "bootz ${loadaddr} ${rdaddr} ${fdtaddr}\0" \
- "tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
- "run ramargs; " \
- "run common_bootargs; " \
- "run dump_bootargs; " \
- "tftpboot ${loadaddr} ${zimage}; " \
- "tftpboot ${rdaddr} ${ramdiskimage}; " \
- "bootm ${loadaddr} ${rdaddr}\0" \
- "tftpbootz=echo 'Booting kernel NFS rootfs...'; " \
- "dhcp;" \
- "run nfsargs;" \
- "run common_bootargs;" \
- "run dump_bootargs;" \
- "tftpboot $loadaddr zImage;" \
- "bootz $loadaddr\0" \
- "nandbootcommon=echo 'Booting kernel from NAND...';" \
- "run nandargs;" \
- "run common_bootargs;" \
- "run dump_bootargs;" \
- "nand read ${loadaddr} kernel;" \
- "nand read ${fdtaddr} spl-os;\0" \
- "nandbootz=run nandbootcommon; "\
- "bootz ${loadaddr} - ${fdtaddr}\0"\
- "nandboot=run nandbootcommon; "\
- "bootm ${loadaddr} - ${fdtaddr}\0"\
-
-#define CONFIG_BOOTCOMMAND \
- "run autoboot"
-
-/* Miscellaneous configurable options */
-
-/* memtest works on */
-#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
- 0x01F00000) /* 31MB */
-
-/* FLASH and environment organization */
-
-/* **** PISMO SUPPORT *** */
-#if defined(CONFIG_CMD_NAND)
-#define CONFIG_SYS_FLASH_BASE 0x10000000
-#endif
-
-#define CONFIG_SYS_MAX_FLASH_SECT 256
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
-#define CONFIG_SYS_FLASH_SIZE 0x4000000
-
-/* Monitor at start of flash */
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-
-#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
-
-#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
-#define CONFIG_ENV_OFFSET 0x260000
-#define CONFIG_ENV_ADDR 0x260000
-
-/* Defines for SPL */
-
-/* NAND: SPL falcon mode configs */
-#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#endif
-
-#endif /* __CONFIG_H */
--
2.19.1.1215.g8438c0b245-goog
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