Dear Marek Szyprowski,
On 08/11/18 00:04, Marek Szyprowski wrote:
> This patch adds minimal support for Exynos5433 SoC (ARM64 based).
>
> The following devices are supported:
> - mmc0 (for eMMC)
> - serial1 (for debug/console)
> - gpa0..3 and gpb0..2 GPIO banks
>
> Based on earlier work done by Lukasz Majewski <l.majew...@samsung.com>.
>
> Signed-off-by: Marek Szyprowski <m.szyprow...@samsung.com>
> ---
> arch/arm/cpu/armv8/Kconfig | 2 +-
> arch/arm/dts/exynos5433.dtsi | 84 ++++++++++++++++++++++++++++++++
> arch/arm/mach-exynos/Kconfig | 7 +++
> arch/arm/mach-exynos/mmu-arm64.c | 24 +++++++++
> arch/arm/mach-exynos/soc.c | 3 ++
> drivers/gpio/s5p_gpio.c | 1 +
> scripts/config_whitelist.txt | 1 +
> 7 files changed, 121 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/exynos5433.dtsi
>
> diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
> index c8bebabdf6..295cdd4653 100644
> --- a/arch/arm/cpu/armv8/Kconfig
> +++ b/arch/arm/cpu/armv8/Kconfig
> @@ -96,7 +96,7 @@ endmenu
> config PSCI_RESET
> bool "Use PSCI for reset and shutdown"
> default y
> - depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && \
> + depends on !ARCH_EXYNOS5433 && !ARCH_EXYNOS7 && !ARCH_BCM283X && \
> !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
> !TARGET_LS2080ARDB && !TARGET_LS2080A_EMU && \
> !TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \
> diff --git a/arch/arm/dts/exynos5433.dtsi b/arch/arm/dts/exynos5433.dtsi
> new file mode 100644
> index 0000000000..509b39a95f
> --- /dev/null
> +++ b/arch/arm/dts/exynos5433.dtsi
> @@ -0,0 +1,84 @@
> +/*
> + * SAMSUNG EXYNOS5433 SoC device tree source
> + *
> + * Copyright (c) 2018 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +/dts-v1/;
> +#include "skeleton.dtsi"
> +
> +/ {
> + mmc_0: mmc@15540000 {
> + compatible = "samsung,exynos-dwmmc";
> + reg = <0x0 0x15540000 0x0 0x1000>;
> + samsung,bus-width = <8>;
> + samsung,timing = <1 3 3>;
> + samsung,removable = <0>;
> + samsung,pre-init;
> + fifoth_val = <0x201f0020>;
> + status = "disabled";
> + };
> +
> + pinctrl_alive: pinctrl@10580000 {
> + compatible = "samsung,exynos5433-pinctrl";
> + reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
> + /* gpa0..3, gpf1..5 */
> +
> + gpa0: gpa0 {
> + gpio-controller;
> + #gpio-cells = <2>;
> + };
> +
> + gpa1: gpa1 {
> + gpio-controller;
> + #gpio-cells = <2>;
> + };
> +
> + gpa2: gpa2 {
> + gpio-controller;
> + #gpio-cells = <2>;
> + };
> +
> + gpa3: gpa3 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + };
> + };
> +
> + pinctrl_peric: pinctrl@14cc0000 {
> + compatible = "samsung,exynos5433-pinctrl";
> + reg = <0x14cc0000 0x1100>;
> + /* gpv7, gpb0, gpc0..3, gpg0, gpd0..4,6,8,7, gpg1..3 */
> +
> + gpv7: gpv7 {
> + gpio-controller;
> + #gpio-cells = <2>;
> + };
> +
> + gpb0: gpb0 {
> + gpio-controller;
> + #gpio-cells = <2>;
> + };
> +
> + gpb1: gpb1 {
> + gpio-controller;
> + #gpio-cells = <2>;
> + };
> +
> + gpb2: gpb2 {
> + gpio-controller;
> + #gpio-cells = <2>;
> + };
> + };
> +
> + serial_1: serial@14c20000 {
> + compatible = "samsung,exynos4210-uart";
> + reg = <0x14c20000 0x100>;
> + id = <1>;
> + status = "disabled";
> + };
> +};
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index ed04369cfa..4a49c8dcc2 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -29,6 +29,13 @@ config ARCH_EXYNOS5
> Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs
> in this family including Exynos5250, Exynos5420 and Exynos5800.
>
> +config ARCH_EXYNOS5433
> + bool "Exynos5433 SoC family"
> + select ARM64
> + help
> + Samsung Exynos5433 SoC family are based on ARM Cortex-A57 CPU and
> + Cortex-A53 CPU (in a big.LITTLE configuration).
> +
> config ARCH_EXYNOS7
> bool "Exynos7 SoC family"
> select ARM64
> diff --git a/arch/arm/mach-exynos/mmu-arm64.c
> b/arch/arm/mach-exynos/mmu-arm64.c
> index 46b8169d19..a857a7318e 100644
> --- a/arch/arm/mach-exynos/mmu-arm64.c
> +++ b/arch/arm/mach-exynos/mmu-arm64.c
> @@ -29,3 +29,27 @@ static struct mm_region exynos7420_mem_map[] = {
>
> struct mm_region *mem_map = exynos7420_mem_map;
> #endif
> +
> +#ifdef CONFIG_EXYNOS5433
> +static struct mm_region exynos5433_mem_map[] = {
> + {
> + .virt = 0x00000000UL,
> + .phys = 0x00000000UL,
> + .size = 0x20000000UL,
> + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> + PTE_BLOCK_NON_SHARE |
> + PTE_BLOCK_PXN | PTE_BLOCK_UXN
> + }, {
> + .virt = 0x20000000UL,
> + .phys = 0x20000000UL,
> + .size = 0xC0000000UL,
> + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
> + PTE_BLOCK_INNER_SHARE
> + }, {
> + /* List terminator */
> + 0,
> + }
> +};
> +
> +struct mm_region *mem_map = exynos5433_mem_map;
> +#endif
> diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c
> index 589e16c5ad..215cbb8f70 100644
> --- a/arch/arm/mach-exynos/soc.c
> +++ b/arch/arm/mach-exynos/soc.c
> @@ -23,6 +23,9 @@ void reset_cpu(ulong addr)
> #ifdef CONFIG_CPU_V7A
> writel(0x1, samsung_get_base_swreset());
> #endif
> +#ifdef CONFIG_ARCH_EXYNOS5433
> + writel(0x1, (void *)0x105C0400);
Please don't use address directly.
> +#endif
> }
>
> #ifndef CONFIG_SYS_DCACHE_OFF
> diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
> index e4b5383d0f..fcaad1c4a6 100644
> --- a/drivers/gpio/s5p_gpio.c
> +++ b/drivers/gpio/s5p_gpio.c
> @@ -357,6 +357,7 @@ static const struct udevice_id exynos_gpio_ids[] = {
> { .compatible = "samsung,exynos4x12-pinctrl" },
> { .compatible = "samsung,exynos5250-pinctrl" },
> { .compatible = "samsung,exynos5420-pinctrl" },
> + { .compatible = "samsung,exynos5433-pinctrl" },
> { }
> };
>
> diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
> index 94c0f1ff82..6438686fc4 100644
> --- a/scripts/config_whitelist.txt
> +++ b/scripts/config_whitelist.txt
> @@ -571,6 +571,7 @@ CONFIG_EXYNOS4210
> CONFIG_EXYNOS5
> CONFIG_EXYNOS5250
> CONFIG_EXYNOS5420
> +CONFIG_EXYNOS5433
> CONFIG_EXYNOS5_DT
> CONFIG_EXYNOS7420
> CONFIG_EXYNOS_ACE_SHA
>
Thanks,
Minkyu Kang.
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