At present there are just two levels of Kconfig option hierarchy in
RISC-V. This adds a new level for platform to specify additional
options. It is organized in a way that platform-specific options
followed by board-specific ones, so that when it comes to the same
Kconfig option, board-specific one takes take the highest precedence,
then platform-specific one, and finally architecture-specific one.
As an example, add the QEMU RISC-V platform-specific Kconfig options.
Signed-off-by: Bin Meng <bmeng...@gmail.com>
---
arch/riscv/Kconfig | 6 ++++++
arch/riscv/cpu/qemu/Kconfig | 9 +++++++++
board/emulation/qemu-riscv/Kconfig | 1 +
3 files changed, 16 insertions(+)
create mode 100644 arch/riscv/cpu/qemu/Kconfig
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index abfc083..4292ffd 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -16,9 +16,15 @@ config TARGET_QEMU_VIRT
endchoice
+# board-specific options below
source "board/AndesTech/ax25-ae350/Kconfig"
source "board/emulation/qemu-riscv/Kconfig"
+# platform-specific options below
+source "arch/riscv/cpu/qemu/Kconfig"
+
+# architecture-specific options below
+
choice
prompt "Base ISA"
default ARCH_RV32I
diff --git a/arch/riscv/cpu/qemu/Kconfig b/arch/riscv/cpu/qemu/Kconfig
new file mode 100644
index 0000000..ec5d934
--- /dev/null
+++ b/arch/riscv/cpu/qemu/Kconfig
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2018, Bin Meng <bmeng...@gmail.com>
+
+config QEMU_RISCV
+ bool
+ imply CPU
+ imply CPU_RISCV
+ imply RISCV_TIMER
diff --git a/board/emulation/qemu-riscv/Kconfig
b/board/emulation/qemu-riscv/Kconfig
index 33ca253..bfe050c 100644
--- a/board/emulation/qemu-riscv/Kconfig
+++ b/board/emulation/qemu-riscv/Kconfig
@@ -17,6 +17,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
+ select QEMU_RISCV
imply SYS_NS16550
imply VIRTIO_MMIO
imply VIRTIO_NET
--
2.7.4
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