On Sun, Oct 28, 2018 at 12:26:18AM +0800, Icenowy Zheng wrote: > 在 2017-10-31二的 09:09 +0100，Maxime Ripard写道： > > On Tue, Oct 31, 2017 at 03:56:08PM +0800, Icenowy Zheng wrote: > > > When I use Orange Pi Prime to do some heavy compliation tasks, the > > > gcc > > > compiler sometimes mysteriously segfaults, and memtester catches > > > memory > > > error. As the lima-memtester cannot support H5 (Mali-450 GPU > > > equipped), > > > there's no really reliable way to detect DRAM stability except try > > > and > > > error. > > > > > > Lower the DDR frequency to 624MHz seems to solved the issue. > > > > > > Set the default frequency to 624MHz in the defconfig, as 672MHz is > > > observed to be unstable at least on my board. > > > > > > Signed-off-by: Icenowy Zheng <icen...@aosc.io> > > > > What is the value used in the fex file? > > When testing with BSP images made by Orange Pi, I found that in newer > images they secretly tweaked the DDR freq of Orange Pi PC2 and Prime to > 624MHz. > > This is found by checking pll-dram frequency after booting.
Ok then. Can you resend that patch? Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
signature.asc
Description: PGP signature
_______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
