Hi Tom,
please consider to pull these patches to your tree.
Buildmain for xilinx boards looks good and travis is not done yet but
link is here (I have seen several timeouts recently but it was there
even on clear mainline).
https://travis-ci.org/michalsimek/u-boot/builds/441591781
If you don't like this please at least cherry-pick this one
Revert "fdt: fdtdec_setup_memory_banksize() use livetree"
(sha1: 01ac0843aeedc3c95fe68e7ce6a8f35bf1a04b23)
which I need for getting SPL up and running again on zynq/zynqmp boards.
Thanks,
Michal
The following changes since commit 15f22ac2eea5ee9f17b14a143c94e7480bbafbff:
ldpaa_eth.c: Fix warning when PHYLIB is not enabled (2018-10-12
07:41:24 -0400)
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.11-rc2
for you to fetch changes up to 045c62be10d64a558f56febcaa2d01b1abbcfa00:
cmd: kgdb: Enable kgdb only for PPC (2018-10-15 12:36:37 +0200)
----------------------------------------------------------------
Xilinx changes for v2018.11-rc2
FPGA:
- Fix SPL fpga loading from FIT
ARM64:
- Fix gic accesses in EL2/EL1
Xilinx:
- Add dlc20 board support
- Add Versal board support
- Sync defconfigs
- Enable MP via Kconfig
- Add missing efuse node
- Enable CDC for zcu100
cmd:
- Fix kgdb Kconfig dependency
serial-pl01x:
- Add support for handling clk from DT
----------------------------------------------------------------
Michal Simek (13):
spl: fpga: Implement fpga bistream loading with fpga_load
arm: zynq: Enable FIT fpga loading in SPL for zc706
arm: zynq: Add support for DLC20 board
Revert "fdt: fdtdec_setup_memory_banksize() use livetree"
arm: zynq: Add efuse node for Zynq-7000S devices
xilinx: Sync defconfigs with current Kconfig
arm64: zynqmp: Enable CDC ethernet gadget for zcu100/Ultra96
arm64: gic: Do gicv3 secure initialization based on EL level
arm64: versal: Add support for new Xilinx Versal ACAPs
net: gem: Do not setup any clock for Xilinx SoC Versal
arm64: versal: Add Xilinx Versal Virtual QEMU board
arm64: zynqmp: Enable MP by default via Kconfig
cmd: kgdb: Enable kgdb only for PPC
Siva Durga Prasad Paladugu (3):
serial: pl01x: Get clock from clock node if no clock property found
arm64: zynqmp: Move TCM initialization to a separate routine
arm64: zynqmp: Add new command for TCM initialization
Kconfig | 2 +-
MAINTAINERS | 6 ++++
arch/arm/Kconfig | 11 +++++++
arch/arm/Makefile | 1 +
arch/arm/cpu/armv8/zynqmp/cpu.c | 12 +++++--
arch/arm/dts/Makefile | 1 +
arch/arm/dts/zynq-7000.dtsi | 5 +++
arch/arm/dts/zynq-dlc20-rev1.0.dts | 103
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++
arch/arm/include/asm/arch-zynqmp/sys_proto.h | 3 ++
arch/arm/lib/gic_64.S | 16 +++++----
arch/arm/mach-versal/Kconfig | 44
+++++++++++++++++++++++++
arch/arm/mach-versal/Makefile | 8 +++++
arch/arm/mach-versal/clk.c | 30 +++++++++++++++++
arch/arm/mach-versal/cpu.c | 83
++++++++++++++++++++++++++++++++++++++++++++++
arch/arm/mach-versal/include/mach/gpio.h | 6 ++++
arch/arm/mach-versal/include/mach/hardware.h | 34
+++++++++++++++++++
arch/arm/mach-versal/include/mach/sys_proto.h | 6 ++++
board/xilinx/versal/MAINTAINERS | 7 ++++
board/xilinx/versal/Makefile | 7 ++++
board/xilinx/versal/board.c | 81
+++++++++++++++++++++++++++++++++++++++++++++
board/xilinx/zynq/zynq-dlc20-rev1.0/ps7_init_gpl.c | 280
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
board/xilinx/zynqmp/cmds.c | 37
++++++++++++++++++++-
cmd/Kconfig | 1 +
common/spl/spl_fit.c | 34
+++++++++----------
configs/avnet_ultra96_rev1_defconfig | 8 +++--
configs/microblaze-generic_defconfig | 2 +-
configs/xilinx_versal_virt_defconfig | 68
++++++++++++++++++++++++++++++++++++++
configs/xilinx_zynqmp_mini_emmc0_defconfig | 1 +
configs/xilinx_zynqmp_mini_emmc1_defconfig | 1 +
configs/xilinx_zynqmp_mini_nand_defconfig | 1 +
configs/xilinx_zynqmp_mini_qspi_defconfig | 1 -
configs/xilinx_zynqmp_zc1232_revA_defconfig | 1 -
configs/xilinx_zynqmp_zc1254_revA_defconfig | 1 -
configs/xilinx_zynqmp_zc1275_revA_defconfig | 1 -
configs/xilinx_zynqmp_zc1275_revB_defconfig | 1 -
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 -
configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 -
configs/xilinx_zynqmp_zc1751_xm017_dc3_defconfig | 1 -
configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig | 1 -
configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 1 -
configs/xilinx_zynqmp_zcu100_revC_defconfig | 8 +++--
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 1 -
configs/xilinx_zynqmp_zcu102_revA_defconfig | 1 -
configs/xilinx_zynqmp_zcu102_revB_defconfig | 1 -
configs/xilinx_zynqmp_zcu104_revA_defconfig | 1 -
configs/xilinx_zynqmp_zcu104_revC_defconfig | 1 -
configs/xilinx_zynqmp_zcu106_revA_defconfig | 1 -
configs/xilinx_zynqmp_zcu111_revA_defconfig | 1 -
configs/zynq_dlc20_rev1_0_defconfig | 74
+++++++++++++++++++++++++++++++++++++++++
configs/zynq_zc706_defconfig | 4 +++
drivers/mmc/Kconfig | 2 +-
drivers/net/Kconfig | 2 +-
drivers/net/zynq_gem.c | 4 +++
drivers/serial/serial_pl01x.c | 26 +++++++++++++++
drivers/spi/Kconfig | 4 +--
env/Kconfig | 4 +--
include/configs/xilinx_versal.h | 91
++++++++++++++++++++++++++++++++++++++++++++++++++
lib/fdtdec.c | 44
+++++++++++++------------
58 files changed, 1101 insertions(+), 78 deletions(-)
create mode 100644 arch/arm/dts/zynq-dlc20-rev1.0.dts
create mode 100644 arch/arm/mach-versal/Kconfig
create mode 100644 arch/arm/mach-versal/Makefile
create mode 100644 arch/arm/mach-versal/clk.c
create mode 100644 arch/arm/mach-versal/cpu.c
create mode 100644 arch/arm/mach-versal/include/mach/gpio.h
create mode 100644 arch/arm/mach-versal/include/mach/hardware.h
create mode 100644 arch/arm/mach-versal/include/mach/sys_proto.h
create mode 100644 board/xilinx/versal/MAINTAINERS
create mode 100644 board/xilinx/versal/Makefile
create mode 100644 board/xilinx/versal/board.c
create mode 100644 board/xilinx/zynq/zynq-dlc20-rev1.0/ps7_init_gpl.c
create mode 100644 configs/xilinx_versal_virt_defconfig
create mode 100644 configs/zynq_dlc20_rev1_0_defconfig
create mode 100644 include/configs/xilinx_versal.h
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