This patch prevents disabling the FPGA bridges when SPL or U-Boot is executed from FPGA onchip RAM.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com> --- There are other patches required to make boot from FPGA work correctly: - CONFIG_SPL_TEXT_BASE needs to be set to 0xC0000000 ideally this is done by moving SPL_TEXT_BASE to Kconfig: https://patchwork.ozlabs.org/patch/976918/ - spl_ram.c needs this patch by Michal Simek: https://patchwork.ozlabs.org/patch/978694/ - For U-Boot to be run from FPGA onchip RAM, either CONFIG_SYS_EXTRA_ENV_RELOC needs to be used or this patch is required to relocate gd->env_addr: https://patchwork.ozlabs.org/patch/975702/ --- arch/arm/mach-socfpga/include/mach/base_addr_ac5.h | 1 + arch/arm/mach-socfpga/misc_gen5.c | 8 ++++++++ arch/arm/mach-socfpga/spl_gen5.c | 4 ++++ 3 files changed, 13 insertions(+) diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h b/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h index bb9e3faa29..2725e9fcc3 100644 --- a/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h +++ b/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h @@ -6,6 +6,7 @@ #ifndef _SOCFPGA_BASE_ADDRS_H_ #define _SOCFPGA_BASE_ADDRS_H_ +#define SOCFPGA_FPGA_SLAVES_ADDRESS 0xc0000000 #define SOCFPGA_STM_ADDRESS 0xfc000000 #define SOCFPGA_DAP_ADDRESS 0xff000000 #define SOCFPGA_EMAC0_ADDRESS 0xff700000 diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c index 429c3d6cd5..fa66484783 100644 --- a/arch/arm/mach-socfpga/misc_gen5.c +++ b/arch/arm/mach-socfpga/misc_gen5.c @@ -187,7 +187,15 @@ void socfpga_sdram_remap_zero(void) setbits_le32(&scu_regs->sacr, 0xfff); /* Configure the L2 controller to make SDRAM start at 0 */ +#if (defined(CONFIG_SPL_BUILD) && \ + (CONFIG_SPL_TEXT_BASE == SOCFPGA_FPGA_SLAVES_ADDRESS)) || \ + ((CONFIG_SYS_TEXT_BASE >= SOCFPGA_FPGA_SLAVES_ADDRESS) && \ + (CONFIG_SYS_TEXT_BASE < SOCFPGA_STM_ADDRESS)) + /* remap.mpuzero, keep fpga bridge enabled */ + writel(0x9, &nic301_regs->remap); +#else writel(0x1, &nic301_regs->remap); /* remap.mpuzero */ +#endif writel(0x1, &pl310->pl310_addr_filter_start); } diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index be318cc0d9..41e7787f11 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -92,8 +92,10 @@ void board_init_f(ulong dummy) /* Put everything into reset but L4WD0. */ socfpga_per_reset_all(); +#if CONFIG_SPL_TEXT_BASE != SOCFPGA_FPGA_SLAVES_ADDRESS /* Put FPGA bridges into reset too. */ socfpga_bridges_reset(1); +#endif socfpga_per_reset(SOCFPGA_RESET(SDR), 0); socfpga_per_reset(SOCFPGA_RESET(UART0), 0); @@ -163,5 +165,7 @@ void board_init_f(ulong dummy) hang(); } +#if CONFIG_SPL_TEXT_BASE != SOCFPGA_FPGA_SLAVES_ADDRESS socfpga_bridges_reset(1); +#endif } -- 2.17.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
