On Mon, Sep 10, 2018 at 11:17:30AM +0900, Masahiro Yamada wrote: > If the OOB size is not multiple of the cache line size, the ARMv7 > cache operation still warns "Misaligned operation at range". > > The real cache coherency problem was fixed by commit e3332e1a1a04 > ("Make kmalloc'ed memory really DMA-safe"). Now it is the matter > of the warning messages. > > => nand info > > Device 0: nand0, sector size 256 KiB > Page size 4096 b > OOB size 224 b > Erase size 262144 b > subpagesize 4096 b > options 0x00104200 > bbt options 0x00060000 > => nand dump 0 > CACHE: Misaligned operation at range [9fb15280, 9fb16360] > CACHE: Misaligned operation at range [9fb15280, 9fb16360] > CACHE: Misaligned operation at range [9fb15280, 9fb16360] > CACHE: Misaligned operation at range [9fb15280, 9fb16360] > ... > > Reported-by: Marek Vasut <ma...@denx.de> > Signed-off-by: Masahiro Yamada <yamada.masah...@socionext.com>
After re-wording the commit message based on Marek's email, applied to u-boot/master, thanks! -- Tom
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