From: David Sniatkiwicz <davi...@marvell.com>
add delay before processing the status flags in pxa3xx_nand_irq().
Signed-off-by: David Sniatkiwicz <davi...@marvell.com>
Reviewed-by: Igal Liberman <ig...@marvell.com>
Reviewed-by: Kostya Porotchkin <kos...@marvell.com>
c: Stefan Roese <s...@denx.de>
Cc: Simon Glass <s...@chromium.org>
---
drivers/mtd/nand/pxa3xx_nand.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index b1bd430..05fd2df 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -694,6 +694,9 @@ static irqreturn_t pxa3xx_nand_irq(struct pxa3xx_nand_info
*info)
cmd_done = NDSR_CS1_CMDD;
}
+ /* TODO - find out why we need the delay during write operation. */
+ ndelay(1);
+
status = nand_readl(info, NDSR);
if (status & NDSR_UNCORERR)
--
2.7.4
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