It is required to clean Management Complex reserve memory before any
usage.
So memset MC reserve memory.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com>
---
Changes for v2:
- updated patch subject
- Consider case of dpl apply and mc_boot failure
Changes for v3
- updated mc_boot failure case for more clarity
drivers/net/fsl-mc/mc.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 940025a467..12f6d8f6e4 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -2,6 +2,7 @@
/*
* Copyright 2014 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
+ * Copyright 2017-2018 NXP
*/
#include <common.h>
#include <errno.h>
@@ -29,6 +30,7 @@
#define MC_BOOT_ENV_VAR "mcinitcmd"
DECLARE_GLOBAL_DATA_PTR;
+static int mc_memset_resv_ram;
static int mc_boot_status = -1;
static int mc_dpl_applied = -1;
#ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
@@ -810,6 +812,11 @@ u64 mc_get_dram_addr(void)
{
size_t mc_ram_size = mc_get_dram_block_size();
+ if (!mc_memset_resv_ram || (get_mc_boot_status() < 0)) {
+ mc_memset_resv_ram = 1;
+ memset((void *)gd->arch.resv_ram, 0, mc_ram_size);
+ }
+
return (gd->arch.resv_ram + mc_ram_size - 1) &
MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
}
--
2.14.1
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