The NAND reset is missing from DT, so the reset manager cannot unreset the NAND. Add the missing DT reset entry.
Signed-off-by: Marek Vasut <ma...@denx.de> Cc: Chin Liang See <chin.liang....@intel.com> Cc: Dinh Nguyen <dingu...@kernel.org> Cc: Ley Foon Tan <ley.foon....@intel.com> --- arch/arm/dts/socfpga_arria10.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi index 573974be04..46f2fd4b69 100644 --- a/arch/arm/dts/socfpga_arria10.dtsi +++ b/arch/arm/dts/socfpga_arria10.dtsi @@ -673,6 +673,7 @@ interrupts = <0 99 4>; dma-mask = <0xffffffff>; clocks = <&nand_clk>; + resets = <&rst NAND_RESET>; status = "disabled"; }; -- 2.17.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot