This patch moves the altera uart driver from cpu/nios2/serial.c to
drivers/serial/altera_uart.c.
The registers access is changed from "volatile struct" to readl()/
writel(). This is consistent with Altera HAL and Linux.
Signed-off-by: Thomas Chou <tho...@wytron.com.tw>
---
drivers/serial/Makefile | 1 +
drivers/serial/altera_uart.c | 116 ++++++++++++++++++++++++++++++++++++++++++
2 files changed, 117 insertions(+), 0 deletions(-)
create mode 100644 drivers/serial/altera_uart.c
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 3c77a7c..7ce920d 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libserial.a
+COBJS-$(CONFIG_ALTERA_UART) += altera_uart.o
COBJS-$(CONFIG_ARM_DCC) += arm_dcc.o
COBJS-$(CONFIG_AT91RM9200_USART) += at91rm9200_usart.o
COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o
diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c
new file mode 100644
index 0000000..b8c97b2
--- /dev/null
+++ b/drivers/serial/altera_uart.c
@@ -0,0 +1,116 @@
+/*
+ * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
+ * Scott McNutt <smcn...@psyent.com>
+ * (C) Copyright 2008, Thomas Chou <tho...@wytron.com.tw>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Altera UART reg defs
+ */
+
+#define ALTERA_UART_SIZE 32
+
+#define ALTERA_UART_RXDATA_REG 0
+#define ALTERA_UART_TXDATA_REG 4
+#define ALTERA_UART_STATUS_REG 8
+#define ALTERA_UART_CONTROL_REG 12
+#define ALTERA_UART_DIVISOR_REG 16
+#define ALTERA_UART_EOP_REG 20
+
+#define ALTERA_UART_STATUS_PE_MSK (0x1)
+#define ALTERA_UART_STATUS_FE_MSK (0x2)
+#define ALTERA_UART_STATUS_BRK_MSK (0x4)
+#define ALTERA_UART_STATUS_ROE_MSK (0x8)
+#define ALTERA_UART_STATUS_TOE_MSK (0x10)
+#define ALTERA_UART_STATUS_TMT_MSK (0x20)
+#define ALTERA_UART_STATUS_TRDY_MSK (0x40)
+#define ALTERA_UART_STATUS_RRDY_MSK (0x80)
+#define ALTERA_UART_STATUS_E_MSK (0x100)
+#define ALTERA_UART_STATUS_DCTS_MSK (0x400)
+#define ALTERA_UART_STATUS_CTS_MSK (0x800)
+#define ALTERA_UART_STATUS_EOP_MSK (0x1000)
+
+#define ALTERA_UART_CONTROL_PE_MSK (0x1)
+#define ALTERA_UART_CONTROL_FE_MSK (0x2)
+#define ALTERA_UART_CONTROL_BRK_MSK (0x4)
+#define ALTERA_UART_CONTROL_ROE_MSK (0x8)
+#define ALTERA_UART_CONTROL_TOE_MSK (0x10)
+#define ALTERA_UART_CONTROL_TMT_MSK (0x20)
+#define ALTERA_UART_CONTROL_TRDY_MSK (0x40)
+#define ALTERA_UART_CONTROL_RRDY_MSK (0x80)
+#define ALTERA_UART_CONTROL_E_MSK (0x100)
+#define ALTERA_UART_CONTROL_TRBK_MSK (0x200)
+#define ALTERA_UART_CONTROL_DCTS_MSK (0x400)
+#define ALTERA_UART_CONTROL_RTS_MSK (0x800)
+#define ALTERA_UART_CONTROL_EOP_MSK (0x1000)
+
+#define ALTERA_UART_EOP_MSK (0xFF)
+#define ALTERA_UART_EOP_OFST (0)
+
+void serial_setbrg(void)
+{
+ unsigned div;
+
+ div = (CONFIG_SYS_UART_FREQ / gd->baudrate) - 1;
+ writel(div, CONFIG_SYS_UART_BASE + ALTERA_UART_DIVISOR_REG);
+ return;
+}
+
+int serial_init(void)
+{
+ serial_setbrg();
+ return 0;
+}
+
+void serial_putc(char c)
+{
+ if (c == '\n')
+ serial_putc('\r');
+ while ((readl(CONFIG_SYS_UART_BASE + ALTERA_UART_STATUS_REG)
+ & ALTERA_UART_CONTROL_TRDY_MSK) == 0)
+ WATCHDOG_RESET();
+ writel((unsigned char)c, CONFIG_SYS_UART_BASE + ALTERA_UART_TXDATA_REG);
+}
+
+void serial_puts(const char *s)
+{
+ while (*s != 0)
+ serial_putc(*s++);
+}
+
+int serial_tstc(void)
+{
+ return readl(CONFIG_SYS_UART_BASE + ALTERA_UART_STATUS_REG)
+ & ALTERA_UART_STATUS_RRDY_MSK;
+}
+
+int serial_getc(void)
+{
+ while (serial_tstc() == 0)
+ WATCHDOG_RESET();
+ return readl(CONFIG_SYS_UART_BASE + ALTERA_UART_RXDATA_REG) & 0x00ff;
+}
--
1.6.6.1
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