usb_clk_cfg is setting CTRL_PHYGATE bit value in probe
which is BIT 0 for sun4i, 6i and 8 for a83t but all
these were handling in phy ops init exit calls.
Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
---
Changes for v2:
- none
drivers/phy/allwinner/phy-sun4i-usb.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c
b/drivers/phy/allwinner/phy-sun4i-usb.c
index 01f585a283..3096f12c1c 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -462,8 +462,6 @@ static int sun4i_usb_phy_probe(struct udevice *dev)
phy->rst_mask = info->rst_mask;
};
- setbits_le32(&data->ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
-
debug("Allwinner Sun4I USB PHY driver loaded\n");
return 0;
}
--
2.17.1
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