On 07/12/2018 01:13 PM, Ley Foon Tan wrote:
> MCR instruction only available in ARM 32-bit. So, compile MCR instruction
> when ARM 32-bit is enabled.
>
> Signed-off-by: Ley Foon Tan <ley.foon....@intel.com>
> ---
> arch/arm/mach-socfpga/board.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
> index cb6530f..26d84be 100644
> --- a/arch/arm/mach-socfpga/board.c
> +++ b/arch/arm/mach-socfpga/board.c
> @@ -19,6 +19,7 @@
> DECLARE_GLOBAL_DATA_PTR;
>
> void s_init(void) {
> +#ifndef CONFIG_ARM64
> /*
> * Preconfigure ACTLR, make sure Write Full Line of Zeroes is disabled.
> * This is optional on CycloneV / ArriaV.
> @@ -29,6 +30,7 @@ void s_init(void) {
> "isb\n"
> "dsb\n"
> ::"r"(0x0));
> +#endif
> }
>
> /*
>
Applied, thanks
--
Best regards,
Marek Vasut
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