On 07/10/2018 03:11 PM, Chee, Tien Fong wrote:
> On Mon, 2018-07-09 at 22:28 +0200, Marek Vasut wrote:
>> On 07/09/2018 08:03 PM, Dinh Nguyen wrote:
>>>
>>>
>>>
>>> On 05/31/2018 03:08 AM, tien.fong.c...@intel.com wrote:
>>>>
>>>> From: Tien Fong Chee <tien.fong.c...@intel.com>
>>>>
>>>> Update pdma properties for Stratix 10
>>>>
>>>> Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com>
>>>> ---
>>>> arch/arm/dts/socfpga_stratix10.dtsi | 20 ++++++++++++++++++++
>>>> 1 file changed, 20 insertions(+)
>>>>
>>>> diff --git a/arch/arm/dts/socfpga_stratix10.dtsi
>>>> b/arch/arm/dts/socfpga_stratix10.dtsi
>>>> index ccd3f32..311ba09 100644
>>>> --- a/arch/arm/dts/socfpga_stratix10.dtsi
>>>> +++ b/arch/arm/dts/socfpga_stratix10.dtsi
>>>> @@ -82,6 +82,26 @@
>>>> ranges = <0 0 0 0xffffffff>;
>>>> u-boot,dm-pre-reloc;
>>>>
>>>> + amba {
>>>> + u-boot,dm-pre-reloc;
>>>> + compatible = "arm,amba-bus";
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + ranges;
>>>> +
>>>> + pdma: pdma@ffda0000 {
>>>> + u-boot,dm-pre-reloc;
>>>> + compatible =
>>>> "arm,pl330", "arm,dma330";
>>> I think you got "arm,dma330" binding wrong. I don't see any binding
>>> with
>>> that name.
> Here https://patchwork.ozlabs.org/patch/923234/ .
>> I think the whole idea of using pl330 to scrub ECC DRAM is wrong. It
>> adds massive amount of code while a CPU can do the same and faster,
>> cfr
>> arria10.
>>
> I just measured the performance of initializing DRAM based on custodian
> arria10_sdmmc, which is around 16sec with 1GB.
Then you're doing something very wrong, it should be around 1 second.
See ie. "SoCFPGA PL330 DMA driver and ECC scrubbing" thread
> Using DMA to init the DDR, which is around 3-4sec for 2GB. I attached
> screenshot for the print out based on arria10_sdmmc custodian.
Well sure, if you do it wrong, it'll take longer for the CPU.
--
Best regards,
Marek Vasut
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
