Hi Tom, please pull these changes to your tree. Buildman and travis looks good https://travis-ci.org/michalsimek/u-boot/builds/392586380
Thanks,
Michal
The following changes since commit 606fddd76c7a045c09d544357806b0b4de4845c7:
Merge branch 'master' of git://git.denx.de/u-boot-net (2018-06-14
07:20:41 -0400)
are available in the git repository at:
git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.07-rc2
for you to fetch changes up to b729ed0d95415bd694a6b67c0761f03ef5a1e2bc:
serial: zynq: Make zynq_serial_setbrg static (2018-06-15 08:54:05 +0200)
----------------------------------------------------------------
Xilinx fixes for v2018.07-rc2
Zynq:
- Fix missing watchdog header
- DT fixes
ZynqMP:
- emmc configuration split
- Enable SPD
- Fix PMUFW_INIT_FILE logic
- Coverity fixes in SoC code
timer
- Add timer_get_boot_us
mmc:
- Fix MMC HS200 tuning command
serial:
- Fix scrabled chars with OF_LIVE
----------------------------------------------------------------
Luca Ceresoli (1):
arm64: zynqmp: accept an absolute path for PMUFW_INIT_FILE
Michal Simek (13):
arm: zynq: Add missing watchdog header
arm: zynq: Drop #address-cells and #size-cells from gpio-keys
timer: cadence: Implement timer_get_boot_us
arm64: zynqmp: Enable SPD ddr support for zcu102 targets
gpio: zynq: Do not check unsigned type that is >= 0
mmc: zynq: Fix tuning_loop_counter type in
arasan_sdhci_execute_tuning()
arm64: zynqmp: Check return value from calloc
arm64: zynqmp: Check return value in zynqmp_mmio_rawwrite()
gpio: zynq_gpio: bank description should use unsigned type
serial: zynq: Use BIT macros instead of shifts and full hex numbers
serial: zynq: Write chars till output fifo is full
serial: zynq: Initialize uart only before relocation
serial: zynq: Make zynq_serial_setbrg static
Siva Durga Prasad Paladugu (2):
arm64: zynqmp: Split emmc configuration into emmc0 and emmc1
mmc: sdhci: Fix MMC HS200 tuning command failures
arch/arm/cpu/armv8/zynqmp/cpu.c
| 6 +++++-
arch/arm/dts/Makefile
| 3 ++-
arch/arm/dts/zynq-zc702.dts
| 2 --
arch/arm/dts/zynq-zturn.dts
| 2 --
arch/arm/dts/{zynqmp-mini-emmc.dts => zynqmp-mini-emmc0.dts}
| 20 ++++++--------------
arch/arm/dts/zynqmp-mini-emmc1.dts
| 67
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
arch/arm/dts/zynqmp-zcu100-revC.dts
| 2 --
arch/arm/dts/zynqmp-zcu102-revA.dts
| 2 --
arch/arm/dts/zynqmp-zcu106-revA.dts
| 2 --
arch/arm/dts/zynqmp-zcu111-revA.dts
| 2 --
board/xilinx/zynq/board.c
| 1 +
board/xilinx/zynqmp/zynqmp.c
| 2 ++
configs/{xilinx_zynqmp_mini_emmc_defconfig =>
xilinx_zynqmp_mini_emmc0_defconfig} | 3 ++-
configs/xilinx_zynqmp_mini_emmc1_defconfig
| 49 +++++++++++++++++++++++++++++++++++++++++++++++++
configs/xilinx_zynqmp_r5_defconfig
| 2 ++
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
| 1 +
configs/xilinx_zynqmp_zcu102_revA_defconfig
| 1 +
configs/xilinx_zynqmp_zcu102_revB_defconfig
| 1 +
drivers/gpio/zynq_gpio.c
| 10 +++++-----
drivers/mmc/sdhci.c
| 8 ++++----
drivers/mmc/zynq_sdhci.c
| 2 +-
drivers/serial/serial_zynq.c
| 24 +++++++++++++++---------
drivers/timer/cadence-ttc.c
| 22 ++++++++++++++++++++++
include/configs/xilinx_zynqmp_zcu102.h
| 3 +++
scripts/Makefile.spl
| 8 +++++++-
25 files changed, 196 insertions(+), 49 deletions(-)
rename arch/arm/dts/{zynqmp-mini-emmc.dts => zynqmp-mini-emmc0.dts} (77%)
create mode 100644 arch/arm/dts/zynqmp-mini-emmc1.dts
rename configs/{xilinx_zynqmp_mini_emmc_defconfig =>
xilinx_zynqmp_mini_emmc0_defconfig} (94%)
create mode 100644 configs/xilinx_zynqmp_mini_emmc1_defconfig
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs
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