Siarhei Siamashka wrote: > 725233: PLD instructions executed with PLD data forwarding > enabled can result in a processor deadlock > > This deadlock can happen when NEON load instructions are used together > with cache preload instructions (PLD). The problematic conditions > can be triggered in-the-wild by NEON optimized functions from pixman > library (http://cgit.freedesktop.org/pixman), which perform dynamic > adjustment of prefetch distance. > > The workaround disables PLD data forwarding by setting PLD_FWD bit > in L2 Cache Auxiliary Control Register as recommended in ARM Cortex-A8 > errata list. > > The deadlock can only happen on r1pX revisions of Cortex-A8 (used in > OMAP34xx/OMAP35xx). Performance impact of the workaround is practically > non-existant. > > Signed-off-by: Siarhei Siamashka <siarhei.siamas...@gmail.com>
Thank you for the improvements on the comment. Ack-ed. Tom _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
