On Fri, Jun 8, 2018 at 4:31 AM, Simon Glass <s...@chromium.org> wrote:
> On 3 June 2018 at 18:04, Bin Meng <bmeng...@gmail.com> wrote:
>> As README.x86 already mentions, there are two SPI flashes mounted
>> on Intel Cougar Canyon 2 board, called SPI-0 and SPI-1 respectively.
>> SPI-0 stores the flash descriptor and the ME firmware. SPI-1 stores
>> the actual BIOS image which is U-Boot. Building a single image with
>> both ME firmware and U-Boot does not make sense.
>>
>> This also describes the exact flash location where the u-boot.rom
>> should be programmed in the documentation.
>>
>> Signed-off-by: Bin Meng <bmeng...@gmail.com>
>> ---
>>
>>  configs/cougarcanyon2_defconfig | 1 +
>>  doc/README.x86                  | 4 +++-
>>  2 files changed, 4 insertions(+), 1 deletion(-)
>
> Reviewed-by: Simon Glass <s...@chromium.org>

applied to u-boot-x86, thanks!
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