On 7.6.2018 14:29, Ibai Erkiaga wrote:
> Create a new KConfig entry to define FIT image position for
> SPL RAM mode.
> 
> Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elo...@xilinx.com>
> ---
> 
>  Kconfig                      | 7 +++++++
>  common/spl/spl_ram.c         | 4 ----
>  scripts/config_whitelist.txt | 1 -
>  3 files changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/Kconfig b/Kconfig
> index 5a82c95..b619ccc 100644
> --- a/Kconfig
> +++ b/Kconfig
> @@ -328,6 +328,13 @@ config SPL_LOAD_FIT
>           particular it can handle selecting from multiple device tree
>           and passing the correct one to U-Boot.
> 
> +config SPL_LOAD_FIT_ADDRESS
> +       hex "SPL FIT Load Address"
> +       default 0x0
> +       depends on SPL_LOAD_FIT
> +       help
> +         Base address from where U-Boot FIT image will be loaded on SPL boot
> +
>  config SPL_LOAD_FIT_FULL
>         bool "Enable SPL loading U-Boot as a FIT"
>         select SPL_FIT
> diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
> index e870193..561d1c0 100644
> --- a/common/spl/spl_ram.c
> +++ b/common/spl/spl_ram.c
> @@ -15,10 +15,6 @@
>  #include <spl.h>
>  #include <linux/libfdt.h>
> 
> -#ifndef CONFIG_SPL_LOAD_FIT_ADDRESS
> -# define CONFIG_SPL_LOAD_FIT_ADDRESS   0
> -#endif
> -
>  static ulong spl_ram_load_read(struct spl_load_info *load, ulong sector,
>                                ulong count, void *buf)
>  {
> diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
> index e99ba6b..037f038 100644
> --- a/scripts/config_whitelist.txt
> +++ b/scripts/config_whitelist.txt
> @@ -1926,7 +1926,6 @@ CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
>  CONFIG_SPL_INIT_MINIMAL
>  CONFIG_SPL_JR0_LIODN_NS
>  CONFIG_SPL_JR0_LIODN_S
> -CONFIG_SPL_LOAD_FIT_ADDRESS

Tom is syncing this file time to time that's why you don't need to do it
but of course you can.

Also please convert zynqmp and dra7xx_evm defconfigs.

>  CONFIG_SPL_MAX_FOOTPRINT
>  CONFIG_SPL_MAX_PEB_SIZE
>  CONFIG_SPL_MAX_SIZE
> --
> 1.8.3.1
> 
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you really need to get rid of this.

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP SoCs


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