On Wed, Jun 6, 2018 at 8:43 PM, Vasily Khoruzhick <[email protected]> wrote: > On Wed, Jun 6, 2018 at 6:56 AM, Jagan Teki <[email protected]> wrote: >> On Wed, Jun 6, 2018 at 9:08 AM, Vasily Khoruzhick <[email protected]> wrote: >>> On A64 OHCI1 clock source is OHCI0 clock, so we need to enable OHCI0 >>> clock when OHCI1 is in use. >>> >>> Fixes commit dd3228170ad7 ("usb: sunxi: Switch to use generic-phy") >>> >>> Signed-off-by: Vasily Khoruzhick <[email protected]> >>> --- >>> drivers/usb/host/ohci-sunxi.c | 7 ++++++- >>> 1 file changed, 6 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c >>> index ce2b47a5c4..5661557a3d 100644 >>> --- a/drivers/usb/host/ohci-sunxi.c >>> +++ b/drivers/usb/host/ohci-sunxi.c >>> @@ -36,6 +36,7 @@ static int ohci_usb_probe(struct udevice *dev) >>> struct ohci_sunxi_priv *priv = dev_get_priv(dev); >>> struct ohci_regs *regs = (struct ohci_regs *)devfdt_get_addr(dev); >>> int extra_ahb_gate_mask = 0; >>> + int extra_usb_gate_mask = 0; >>> int phys, ret; >>> >>> priv->ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; >>> @@ -78,13 +79,17 @@ no_phy: >>> extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0; >>> #endif >>> priv->usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK; >>> +#ifdef CONFIG_MACH_SUN50I >>> + extra_usb_gate_mask = CCM_USB_CTRL_OHCI0_CLK; >> >> This look reassigning same clock to twice? > > extra_usb_gate_mask isn't shifted later and thus > CCM_USB_CTRL_OHCI0_CLK and CCM_USB_CTRL_OHCI1_CLK will be enabled for > phy 1 on A64.
Where are you checking phy 1? and you still using CCM_USB_CTRL_OHCI0_CLK not OHCI1_CLK _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
