On 05/15/2018 06:45 PM, Ben Kalo wrote:
> According to ARM Cortex-A9 MPCore TRM section 2.2 - SCU registers
> Access Control register offset is 0x50.
>
> Signed-off-by: Ben Kalo <ben.h.k...@gmail.com>
> Cc: Marek Vasut <ma...@denx.de>
> Cc: Albert Aribaud <albert.u.b...@aribaud.net>
> ---
>
> arch/arm/mach-socfpga/include/mach/scu.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-socfpga/include/mach/scu.h
> b/arch/arm/mach-socfpga/include/mach/scu.h
> index 27224b1..b684a55 100644
> --- a/arch/arm/mach-socfpga/include/mach/scu.h
> +++ b/arch/arm/mach-socfpga/include/mach/scu.h
> @@ -14,8 +14,8 @@ struct scu_registers {
> u32 _pad_0x10_0x3c[12]; /* 0x10 */
> u32 fsar; /* 0x40 */
> u32 fear;
> - u32 _pad_0x48_0x50[2];
> - u32 acr; /* 0x54 */
> + u32 _pad_0x48_0x4c[2];
> + u32 acr; /* 0x50 */
> u32 sacr;
> };
>
>
Applied, thanks.
--
Best regards,
Marek Vasut
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
