> On 14 May 2018, at 12:42, Jonathan Gray <j...@jsg.id.au> wrote: > > On Mon, May 14, 2018 at 11:28:38AM +0200, Wadim Egorov wrote: >> Hi, >> >> >> Am 08.05.2018 um 10:05 schrieb Dr. Philipp Tomsich: >>> Looks like the designware GMAC driver is trying to enable a clock and >>> can???t deal with the -ENOENT. Could you try to see which clock it is >>> requesting and add the necessary entries in the clock-enable function? >>> >>> If you have a patch, I???ll try to prioritise it, so we get these >>> regressions >>> cleaned up quickly (note that these had all been in rc3???if we???d known >>> earlier, I could have reverted them out for the release). >>> >>> @Wadim: could you please also look into this, as your board should have >>> similar problems (unless your device-tree is very different). >> unfortunately I am not able to test ethernet on our board right now, >> because there are a few things missing in the designware/gmac part. >> But someone is working on it right now :) >> >> Anyway, it looks like Jonathan fixed the problem, right? >> >> Regards, >> Wadim > > The patch I sent out works for me. Hasn't landed in u-boot-rockchip or > master yet though.
I had been waiting for Wadim to also take a look. I’ll take his remark as a “can’t test” and will move it along. I plan to request a pull into master, once we have all these regression fixes collected (I hope this is the last one). > >> >>> >>> Thanks, >>> Philipp. >>> >>>> On 8 May 2018, at 09:51, Jonathan Gray <j...@jsg.id.au> wrote: >>>> >>>> On Thu, Apr 26, 2018 at 09:05:33AM +0200, Philipp Tomsich wrote: >>>>>> The generic ehci-driver (ehci-generic.c) will try to enable the clocks >>>>>> listed in the DTSI. If this fails (e.g. due to clk_enable not being >>>>>> implemented in a driver and -ENOSYS being returned by the clk-uclass), >>>>>> the driver will bail our and print an error message. >>>>>> >>>>>> This implements a minimal clk_enable for the RK3288 and supports the >>>>>> clocks mandatory for the EHCI controllers; as these are enabled by >>>>>> default we simply return success. >>>>>> >>>>>> Signed-off-by: Wadim Egorov <w.ego...@phytec.de> >>>>>> Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> >>>>>> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> >>>>>> --- >>>>>> drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ >>>>>> 1 file changed, 13 insertions(+) >>>>>> >>>>> Applied to u-boot-rockchip, thanks! >>>> This change broke Ethernet on tinker-rk3288. >>>> >>>> U-Boot 2018.05-00002-g6ea9f3dd70 (May 08 2018 - 17:21:32 +1000) >>>> >>>> Model: Tinker-RK3288 >>>> DRAM: 2 GiB >>>> MMC: dwmmc@ff0c0000: 1 >>>> Loading Environment from MMC... *** Warning - bad CRC, using default >>>> environment >>>> >>>> Failed (-5) >>>> In: serial >>>> Out: serial >>>> Err: serial >>>> Model: Tinker-RK3288 >>>> Net: failed to enable clock 0 >>>> No ethernet found. >>>> >>>> After reverting it: >>>> >>>> U-Boot 2018.05-00003-g338bfe2fbf (May 08 2018 - 17:40:09 +1000) >>>> >>>> Model: Tinker-RK3288 >>>> DRAM: 2 GiB >>>> MMC: dwmmc@ff0c0000: 1 >>>> Loading Environment from MMC... *** Warning - bad CRC, using default >>>> environment >>>> >>>> Failed (-5) >>>> In: serial >>>> Out: serial >>>> Err: serial >>>> Model: Tinker-RK3288 >>>> Net: eth0: ethernet@ff290000 >>>> Hit any key to stop autoboot: 0 >>>> >>>> If the default case returned ENOSYS or ENOTSUPP instead of ENOENT it >>>> would work given the changes that were made last time this broke. >>>> >>>> commit 1693a577be14a92e61563bad306aa11a359757f5 >>>> Author: Eugeniy Paltsev <eugeniy.palt...@synopsys.com> >>>> Date: Tue Feb 6 17:12:09 2018 +0300 >>>> >>>> NET: designware: fix clock enable >> >> _______________________________________________ >> U-Boot mailing list >> U-Boot@lists.denx.de <mailto:U-Boot@lists.denx.de> >> https://lists.denx.de/listinfo/u-boot <https://lists.denx.de/listinfo/u-boot> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
