On 04/19/2018 07:15 AM, See, Chin Liang wrote: > On Thu, 2018-04-19 at 04:47 +0200, Marek Vasut wrote: >> On 04/19/2018 11:50 AM, Ley Foon Tan wrote: >>> >>> Add CONFIG_SYS_L2_PL310 conditional build. >> Why ? >> > > In ARM64, L2 cache controller is accessed through processor registers. > Hence we shall make this conditional in order this file can be shared > across SOCFPGAs.
That should be in the patch description . Do you ever add the PL310 register access on S10 later in the set? -- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
