Add an option to get the clock speed from the device tree, hence adding
compatibility with DM clock drivers.

Signed-off-by: Mario Six <mario....@gdsys.cc>
---
 drivers/i2c/fsl_i2c.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index ad8eea4389..450a91ded6 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -12,6 +12,7 @@
 #include <i2c.h>               /* Functional interface */
 #include <asm/io.h>
 #include <asm/fsl_i2c.h>       /* HW definitions */
+#include <clk.h>
 #include <dm.h>
 #include <mapmem.h>
 
@@ -573,6 +574,7 @@ static int fsl_i2c_set_bus_speed(struct udevice *bus, uint 
speed)
 static int fsl_i2c_ofdata_to_platdata(struct udevice *bus)
 {
        struct fsl_i2c_dev *dev = dev_get_priv(bus);
+       struct clk clock;
 
        dev->base = map_sysmem(dev_read_addr(bus), sizeof(struct fsl_i2c_base));
 
@@ -584,7 +586,11 @@ static int fsl_i2c_ofdata_to_platdata(struct udevice *bus)
                                             0x7f);
        dev->speed = dev_read_u32_default(bus, "clock-frequency", 400000);
 
-       dev->i2c_clk = dev->index ? gd->arch.i2c2_clk : gd->arch.i2c1_clk;
+       if (!clk_get_by_index(bus, 0, &clock))
+               dev->i2c_clk = clk_get_rate(&clock);
+       else
+               dev->i2c_clk = dev->index ? gd->arch.i2c2_clk :
+                                           gd->arch.i2c1_clk;
 
        return 0;
 }
-- 
2.16.1

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