* add a real AT91 GPIO driver instead of header inline code
* change board config files to use new driver
Signed-off-by: Jens Scharsig <js_at...@scharsoft.de>
---
drivers/gpio/Makefile | 1 +
drivers/gpio/at91_gpio.c | 240 ++++++++++++++++++++++++++++++++++++
include/asm-arm/arch-at91/gpio.h | 151 +----------------------
include/configs/afeb9260.h | 1 +
include/configs/at91cap9adk.h | 1 +
include/configs/at91sam9260ek.h | 2 +
include/configs/at91sam9261ek.h | 2 +
include/configs/at91sam9263ek.h | 2 +
include/configs/at91sam9m10g45ek.h | 2 +
include/configs/at91sam9rlek.h | 2 +
include/configs/cpu9260.h | 2 +
include/configs/meesc.h | 2 +
include/configs/pm9261.h | 2 +
include/configs/pm9263.h | 2 +
include/configs/sbc35_a9g20.h | 2 +
include/configs/tny_a9260.h | 2 +
16 files changed, 268 insertions(+), 148 deletions(-)
create mode 100644 drivers/gpio/at91_gpio.c
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index acba56c..d966082 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libgpio.a
+COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o
COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
COBJS-$(CONFIG_MX31_GPIO) += mx31_gpio.o
COBJS-$(CONFIG_PCA953X) += pca953x.o
diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
new file mode 100644
index 0000000..5e50ead
--- /dev/null
+++ b/drivers/gpio/at91_gpio.c
@@ -0,0 +1,240 @@
+/*
+ * Memory Setup stuff - taken from blob memsetup.S
+ *
+ * Copyright (C) 2009 Jens Scharsig (js_at...@scharsoft.de)
+ *
+ * Copyright (C) 2005 HP Labs
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/sizes.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/io.h>
+#include <asm/arch/at91_pio.h>
+
+#define PIN_BASE 32
+
+u32 portpin_to_port(u32 portpin)
+{
+ return (portpin - PIN_BASE) / 32;
+}
+
+u32 portpin_to_pin(u32 portpin)
+{
+ return 1 << ((portpin - PIN_BASE) % 32);
+}
+
+/*
+ * mux the pin to the "GPIO" peripheral role.
+ */
+int at91_set_gpio_periph(unsigned pin, int use_pullup)
+{
+ at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ u32 port = portpin_to_port(pin);
+ u32 mask = portpin_to_pin(pin);
+
+ writel(mask, &pio->port[port].idr);
+ if (use_pullup)
+ writel(mask, &pio->port[port].puer);
+ else
+ writel(mask, &pio->port[port].pudr);
+ writel(mask, &pio->port[port].per);
+
+ return 0;
+}
+
+/*
+ * mux the pin to the "A" internal peripheral role.
+ */
+int at91_set_a_periph(unsigned pin, int use_pullup)
+{
+ at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ u32 port = portpin_to_port(pin);
+ u32 mask = portpin_to_pin(pin);
+
+ writel(mask, &pio->port[port].idr);
+ if (use_pullup)
+ writel(mask, &pio->port[port].puer);
+ else
+ writel(mask, &pio->port[port].pudr);
+ writel(mask, &pio->port[port].asr);
+ writel(mask, &pio->port[port].pdr);
+
+ return 0;
+}
+
+/*
+ * mux the pin to the "B" internal peripheral role.
+ */
+int at91_set_b_periph(unsigned pin, int use_pullup)
+{
+ at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ u32 port = portpin_to_port(pin);
+ u32 mask = portpin_to_pin(pin);
+
+ writel(mask, &pio->port[port].idr);
+ if (use_pullup)
+ writel(mask, &pio->port[port].puer);
+ else
+ writel(mask, &pio->port[port].pudr);
+ writel(mask, &pio->port[port].bsr);
+ writel(mask, &pio->port[port].pdr);
+
+ return 0;
+}
+
+/*
+ * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
+ * configure it for an input.
+ */
+int at91_set_gpio_input(u32 pin, int use_pullup)
+{
+ at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ u32 port = portpin_to_port(pin);
+ u32 mask = portpin_to_pin(pin);
+
+ writel(mask, &pio->port[port].idr);
+ if (use_pullup)
+ writel(mask, &pio->port[port].puer);
+ else
+ writel(mask, &pio->port[port].pudr);
+ writel(mask, &pio->port[port].odr);
+ writel(mask, &pio->port[port].per);
+ return 0;
+}
+
+/*
+ * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
+ * and configure it for an output.
+ */
+int at91_set_gpio_output(u32 pin, int value)
+{
+ at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ u32 port = portpin_to_port(pin);
+ u32 mask = portpin_to_pin(pin);
+
+ writel(mask, &pio->port[port].idr);
+ writel(mask, &pio->port[port].pudr);
+ if (value)
+ writel(mask, &pio->port[port].sodr);
+ else
+ writel(mask, &pio->port[port].codr);
+ writel(mask, &pio->port[port].oer);
+ writel(mask, &pio->port[port].per);
+
+ return 0;
+}
+
+/*
+ * enable/disable the glitch filter; mostly used with IRQ handling.
+ */
+int at91_set_deglitch(unsigned pin, int is_on)
+{
+ at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ u32 port = portpin_to_port(pin);
+ u32 mask = portpin_to_pin(pin);
+
+ if (is_on)
+ writel(mask, &pio->port[port].ifer);
+ else
+ writel(mask, &pio->port[port].ifdr);
+ return 0;
+}
+
+/*
+ * enable/disable the multi-driver; This is only valid for output and
+ * allows the output pin to run as an open collector output.
+ */
+int at91_set_multi_drive(unsigned pin, int is_on)
+{
+ at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ u32 port = portpin_to_port(pin);
+ u32 mask = portpin_to_pin(pin);
+
+ if (is_on)
+ writel(mask, &pio->port[port].mder);
+ else
+ writel(mask, &pio->port[port].mddr);
+ return 0;
+}
+
+/*
+int gpio_direction_input(unsigned pin)
+{
+ at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ u32 port = portpin_to_port(pin);
+ u32 mask = portpin_to_pin(pin);
+
+ if (!(readl(&pio->port[port].psr) & mask))
+ return -EINVAL;
+ writel(mask, &pio->port[port].odr);
+ return 0;
+}
+
+int gpio_direction_output(unsigned pin, int value)
+{
+ at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ u32 port = portpin_to_port(pin);
+ u32 mask = portpin_to_pin(pin);
+
+ if (!(readl(&pio->port[port].psr) & mask))
+ return -EINVAL;
+ if (value)
+ writel(mask, &pio->port[port].sodr);
+ else
+ writel(mask, &pio->port[port].codr);
+ writel(mask, &pio->port[port].oer);
+
+ return 0;
+}
+*/
+/*
+ * assuming the pin is muxed as a gpio output, set its value.
+ */
+int at91_set_gpio_value(unsigned pin, int value)
+{
+ at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ u32 port = portpin_to_port(pin);
+ u32 mask = portpin_to_pin(pin);
+
+ /* printf("%d = Port %d Pin %d (%d)",pin, port, mask, value); */
+ if (value)
+ writel(mask, &pio->port[port].sodr);
+ else
+ writel(mask, &pio->port[port].codr);
+ return 0;
+}
+
+/*
+ * read the pin's value (works even if it's not muxed as a gpio).
+ */
+int at91_get_gpio_value(unsigned pin)
+{
+ at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ u32 port = portpin_to_port(pin);
+ u32 mask = portpin_to_pin(pin);
+ u32 pdsr;
+
+ pdsr = readl(&pio->port[port]);
+ return (pdsr & mask) != 0;
+}
+
diff --git a/include/asm-arm/arch-at91/gpio.h b/include/asm-arm/arch-at91/gpio.h
index bc53171..b0c572f 100644
--- a/include/asm-arm/arch-at91/gpio.h
+++ b/include/asm-arm/arch-at91/gpio.h
@@ -216,155 +216,10 @@ static inline unsigned pin_to_mask(unsigned pin)
return 1 << (pin % 32);
}
-/*
- * mux the pin to the "GPIO" peripheral role.
- */
-static inline int at91_set_GPIO_periph(unsigned pin, int use_pullup)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(mask, pio + PIO_PER);
- return 0;
-}
-
-/*
- * mux the pin to the "A" internal peripheral role.
- */
-static inline int at91_set_A_periph(unsigned pin, int use_pullup)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(mask, pio + PIO_ASR);
- __raw_writel(mask, pio + PIO_PDR);
- return 0;
-}
-
-/*
- * mux the pin to the "B" internal peripheral role.
- */
-static inline int at91_set_B_periph(unsigned pin, int use_pullup)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(mask, pio + PIO_BSR);
- __raw_writel(mask, pio + PIO_PDR);
- return 0;
-}
-
-/*
- * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
- * configure it for an input.
- */
-static inline int at91_set_gpio_input(unsigned pin, int use_pullup)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(mask, pio + PIO_ODR);
- __raw_writel(mask, pio + PIO_PER);
- return 0;
-}
-
-/*
- * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
- * and configure it for an output.
- */
-static inline int at91_set_gpio_output(unsigned pin, int value)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + PIO_PUDR);
- __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
- __raw_writel(mask, pio + PIO_OER);
- __raw_writel(mask, pio + PIO_PER);
- return 0;
-}
-
-/*
- * enable/disable the glitch filter; mostly used with IRQ handling.
- */
-static inline int at91_set_deglitch(unsigned pin, int is_on)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
- return 0;
-}
-
-/*
- * enable/disable the multi-driver; This is only valid for output and
- * allows the output pin to run as an open collector output.
- */
-static inline int at91_set_multi_drive(unsigned pin, int is_on)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + (is_on ? PIO_MDER : PIO_MDDR));
- return 0;
-}
-
-static inline int gpio_direction_input(unsigned pin)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- if (!(__raw_readl(pio + PIO_PSR) & mask))
- return -EINVAL;
- __raw_writel(mask, pio + PIO_ODR);
- return 0;
-}
+#define at91_set_GPIO_periph at91_set_gpio_periph
+#define at91_set_A_periph at91_set_a_periph
+#define at91_set_B_periph at91_set_b_periph
-static inline int gpio_direction_output(unsigned pin, int value)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- if (!(__raw_readl(pio + PIO_PSR) & mask))
- return -EINVAL;
- __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
- __raw_writel(mask, pio + PIO_OER);
- return 0;
-}
-
-/*
- * assuming the pin is muxed as a gpio output, set its value.
- */
-static inline int at91_set_gpio_value(unsigned pin, int value)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
- return 0;
-}
-
-/*
- * read the pin's value (works even if it's not muxed as a gpio).
- */
-static inline int at91_get_gpio_value(unsigned pin)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
- u32 pdsr;
-
- pdsr = __raw_readl(pio + PIO_PDSR);
- return (pdsr & mask) != 0;
-}
#endif
#endif
diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h
index 3b69de8..9f8c567 100644
--- a/include/configs/afeb9260.h
+++ b/include/configs/afeb9260.h
@@ -47,6 +47,7 @@
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h
index 4c2782a..9da5846 100644
--- a/include/configs/at91cap9adk.h
+++ b/include/configs/at91cap9adk.h
@@ -49,6 +49,7 @@
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index a620d57..6d8969b 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -54,6 +54,8 @@
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
+
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 832b1cd..e67d899 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -52,6 +52,8 @@
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
+
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index 1d82a15..dc010f2 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -51,6 +51,8 @@
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
+
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
diff --git a/include/configs/at91sam9m10g45ek.h
b/include/configs/at91sam9m10g45ek.h
index 50b118f..d034863 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -52,6 +52,8 @@
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
+
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 8db296a..423890b 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -49,6 +49,8 @@
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
+
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
diff --git a/include/configs/cpu9260.h b/include/configs/cpu9260.h
index e967e7c..50e31ff 100644
--- a/include/configs/cpu9260.h
+++ b/include/configs/cpu9260.h
@@ -244,6 +244,8 @@
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
+
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index 253a53d..13e60e7 100644
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -58,6 +58,8 @@
*/
/* Console output */
+#define CONFIG_AT91_GPIO 1
+
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index 26a2fad..25b6689 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -159,6 +159,8 @@
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
+
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index e55098c..f318a86 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -173,6 +173,8 @@
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
+
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
diff --git a/include/configs/sbc35_a9g20.h b/include/configs/sbc35_a9g20.h
index 7bdc729..3f0723f 100644
--- a/include/configs/sbc35_a9g20.h
+++ b/include/configs/sbc35_a9g20.h
@@ -59,6 +59,8 @@
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
+
#define CONFIG_ATMEL_USART
#define CONFIG_USART0
#undef CONFIG_USART1
diff --git a/include/configs/tny_a9260.h b/include/configs/tny_a9260.h
index 21475f8..466d27b 100644
--- a/include/configs/tny_a9260.h
+++ b/include/configs/tny_a9260.h
@@ -68,6 +68,8 @@
/*
* Hardware drivers
*/
+#define CONFIG_AT91_GPIO 1
+
#define CONFIG_ATMEL_USART 1
#undef CONFIG_USART0
#undef CONFIG_USART1
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