This patch added Kconfig support for CONFIG_SYS_ZYNQ_QSPI_WAIT
and set it to default value 10 milliseconds.

Signed-off-by: Vipul Kumar <vip...@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva...@xilinx.com>
---
-Changes in v2:
- Added depends on ZYNQ_QSPI
- Branch: u-boot-microblaze/kconfig
---
 drivers/spi/Kconfig     | 7 +++++++
 drivers/spi/zynq_qspi.c | 3 ---
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 235a8c7..94f6d7d 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -204,6 +204,13 @@ config ZYNQ_QSPI
          Zynq QSPI IP core. This IP is used to connect the flash in
          4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.

+config SYS_ZYNQ_QSPI_WAIT
+       int "Define Zynq QSPI wait time in ms"
+       depends on ZYNQ_QSPI
+       default 10
+       help
+         Define default Zynq QSPI wait time in milliseconds.
+
 endif # if DM_SPI

 config SOFT_SPI
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index 255e02f..c9241aa 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -46,9 +46,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ZYNQ_QSPI_CR_SS_SHIFT          10      /* Slave select shift */

 #define ZYNQ_QSPI_FIFO_DEPTH           63
-#ifndef CONFIG_SYS_ZYNQ_QSPI_WAIT
-#define CONFIG_SYS_ZYNQ_QSPI_WAIT      CONFIG_SYS_HZ/100       /* 10 ms */
-#endif

 /* zynq qspi register set */
 struct zynq_qspi_regs {
--
2.7.4

This email and any attachments are intended for the sole use of the named 
recipient(s) and contain(s) confidential information that may be proprietary, 
privileged or copyrighted under applicable law. If you are not the intended 
recipient, do not read, copy, or forward this email message or any attachments. 
Delete this email message and any attachments immediately.
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Reply via email to