This patch include the support for SPD binary required by Broadwell-DE FSP in
case the platform has memory down enabled.
Signed-off-by: Vincenzo Bove <vnk...@protonmail.com>
---
arch/x86/Kconfig | 24 ++++++++++++++++++++++++
arch/x86/dts/u-boot.dtsi | 6 ++++++
2 files changed, 30 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 5c23b2cb57..9d78c80d9f 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -766,6 +766,30 @@ config HIGH_TABLE_SIZE
Increse it if the default size does not fit the board's needs.
This is most likely due to a large ACPI DSDT table is used.
+config FSP_MEMORY_DOWN
+ bool "Platform has memory down"
+ help
+ Select this option if your platform has memory soldered on the motherboard
and FSP need SPD file.
+
+config HAVE_SPD
+ bool "Add SPD file"
+ help
+ Select this option if you have a SPD binary file for your memorydown.
+
+config SPD_FILE
+ string "SPD image filename"
+ depends on HAVE_SPD
+ default "spd_ch0_dimm0.bin"
+ help
+ The filename of the ram SPD binary.
+
+config SPD_ADDR
+ hex "SPD image location"
+ depends on HAVE_SPD
+ default 0xffcb0000
+ help
+ The location of the SPD binary file.
+
source "arch/x86/lib/efi/Kconfig"
endmenu
diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi
index 7e37d4f394..486abe31bf 100644
--- a/arch/x86/dts/u-boot.dtsi
+++ b/arch/x86/dts/u-boot.dtsi
@@ -67,6 +67,12 @@
pos = <CONFIG_VGA_BIOS_ADDR>;
};
#endif
+#ifdef CONFIG_HAVE_SPD
+ intel-spd {
+ filename = CONFIG_SPD_FILE;
+ pos = <CONFIG_SPD_ADDR>;
+ };
+#endif
#ifdef CONFIG_HAVE_VBT
intel-vbt {
filename = CONFIG_VBT_FILE;
--
2.11.0
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