Hi, On this topic, Cyrille has a patches here, as a reference.
https://lists.denx.de/pipermail/u-boot/2017-July/299409.html On 2017/12/11 13:57, Prabhakar Kushwaha wrote:
SPI-NOR framework currently supports- - (1-1-1, 1-1-2, 1-1-4) read protocols - read latency(dummy bytes) are hardcoded with the assumption that the flash would support it. - No support of mode bits. - No support of flash size above 128Mib This patch set add support of 1-2-2, 1-4-4 read protocols. It ports Linux commits "mtd: spi-nor: add a stateless method to support memory size above 128Mib" and "mtd: spi-nor: parse Serial Flash Discoverable Parameters (SFDP) tables". It enables 4byte address opcode and run time flash parameters discovery including dummy cycle and mode cycle. Finally it update fsl-quadspi driver to store(set_mode) spi bus mode and provision for run-time LUTs creation. Note: This patch-set is only **compliation** tested. Sending RFC to get early feed-back on the approach. Prabhakar Kushwaha (5): sf: Add support of 1-2-2, 1-4-4 IO READ protocols sf: add method to support memory size above 128Mib sf: parse Serial Flash Discoverable Parameters (SFDP) tables sf: fsl_qspi: Add support of fsl_qspi_set_mode sf: fsl_quadspi: Configue LUT based on padding information drivers/mtd/spi/sf_internal.h | 230 +++++++++++++++- drivers/mtd/spi/spi_flash.c | 574 +++++++++++++++++++++++++++++++++++++++- drivers/spi/fsl_qspi.c | 85 +++++- include/spi_flash.h | 2 + 5 files changed, 875 insertions(+), 18 deletions(-)
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