Hi
I am very sorry to ask this simple question. I read a lot of document
and googled online, but I still feel puzzled by the SPL of U-Boot.
I has an ancient SoC s3c2440 which is armv4t architecture. s3c2440 will
copy the first 4K code on NAND to static SRAM. It is obvious that u-boot
bin is bigger than 4K. so Here is my question:
1. In this condition, do I must compile a SPL bin？ and flash it to the
first page of NAND flash. if it's, I think the SPL should be less than
4K, or it's meaningless, It still need to copy remain content, and has
no difference with a single u-boot.
2. can I only compile a regular u-boot and do copy work and relocate
work at this single u-boot. namely, merge SPL and regular u-boot, does
u-boot support this framework?
thanks very much!
From 袁建鹏 (Yuan Jianpeng)
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