On Wed, Nov 15, 2017 at 01:14:52PM +0100, patrice.chot...@st.com wrote:

> From: Patrice Chotard <patrice.chot...@st.com>
> 
> MMC block needs 48Mhz source clock, for that we choose
> to select the SAI PLL.
> Update also stm32_clock_get_rate() to retrieve the MMC
> clock source needed in MMC driver.
> 
> STM32F4 uses a different RCC variant than STM32F7. For STM32F4
> sdmmc clocks bit are located into dckcfgr register whereas there
> are located into dckcfgr2 registers on STM32F7.
> In both registers, bits CK48MSEL and SDMMC1SEL are located at
> the same position.
> 
> Signed-off-by: Christophe Priouzeau <christophe.priouz...@st.com>
> Signed-off-by: Patrice Chotard <patrice.chot...@st.com>
> Reviewed-by: Vikas Manocha <vikas.mano...@st.com>

Applied to u-boot/master, thanks!

-- 
Tom

Attachment: signature.asc
Description: PGP signature

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

Reply via email to