Hi Martyn,
On 01/11/2017 16:42, Martyn Welch wrote:
> On Wed, 2017-11-01 at 16:31 +0100, Stefano Babic wrote:
>> On 01/11/2017 15:23, Martyn Welch wrote:
>>> Add missing parts for i.MX53 PWM support
>>>
>>> Acked-by: Nandor Han <nandor....@ge.com>
>>> Signed-off-by: Martyn Welch <martyn.we...@collabora.co.uk>
>>> Cc: Stefano Babic <sba...@denx.de>
>>> ---
>>> arch/arm/include/asm/arch-mx5/imx-regs.h | 19 +++++++++++++++++++
>>> drivers/pwm/pwm-imx-util.c | 2 ++
>>> 2 files changed, 21 insertions(+)
>>>
>>> diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h
>>> b/arch/arm/include/asm/arch-mx5/imx-regs.h
>>> index 3e79fa3..c2ff798 100644
>>> --- a/arch/arm/include/asm/arch-mx5/imx-regs.h
>>> +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
>>> @@ -508,6 +508,25 @@ struct fuse_bank4_regs {
>>> };
>>> #endif
>>>
>>> +#if defined(CONFIG_MX53)
>>
>> It looks to me this is not MX53 specific. You are already changing a MX5
>> file. As far as I see, this is valid at least for MX51. Do we need the
>> #ifdef ?
>>
>
> I only have access to an MX53, I'm not familiar with the rest of the MX5
> family and was thus playing it safe.
Yes, but the reference manual for MX51 and MX53 (Chapter 38 in MX51)
shows the same register layout.
Best regards,
Stefano
>
>>> +#define PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)
>>> +#define PWMCR_DOZEEN (1 << 24)
>>> +#define PWMCR_WAITEN (1 << 23)
>>> +#define PWMCR_DBGEN (1 << 22)
>>> +#define PWMCR_CLKSRC_IPG_HIGH (2 << 16)
>>> +#define PWMCR_CLKSRC_IPG (1 << 16)
>>> +#define PWMCR_EN (1 << 0)
>>> +
>>> +struct pwm_regs {
>>> + u32 cr;
>>> + u32 sr;
>>> + u32 ir;
>>> + u32 sar;
>>> + u32 pr;
>>> + u32 cnr;
>>> +};
>>> +#endif
>>> +
>>> #endif /* __ASSEMBLER__*/
>>>
>>> #endif /* __ASM_ARCH_MX5_IMX_REGS_H__ */
>>> diff --git a/drivers/pwm/pwm-imx-util.c b/drivers/pwm/pwm-imx-util.c
>>> index 534dd8e..97ac0c8 100644
>>> --- a/drivers/pwm/pwm-imx-util.c
>>> +++ b/drivers/pwm/pwm-imx-util.c
>>> @@ -23,10 +23,12 @@ struct pwm_regs *pwm_id_to_reg(int pwm_id)
>>> return (struct pwm_regs *)PWM1_BASE_ADDR;
>>> case 1:
>>> return (struct pwm_regs *)PWM2_BASE_ADDR;
>>> +#ifdef CONFIG_MX6
>>> case 2:
>>> return (struct pwm_regs *)PWM3_BASE_ADDR;
>>> case 3:
>>> return (struct pwm_regs *)PWM4_BASE_ADDR;
>>> +#endif
>>> #ifdef CONFIG_MX6SX
>>> case 4:
>>> return (struct pwm_regs *)PWM5_BASE_ADDR;
>>>
>>
>>
>> Best regards,
>> Stefano Babic
>>
>
>
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