Update dmc node for full feature driver.
Signed-off-by: Kever Yang <kever.y...@rock-chips.com>
---
arch/arm/dts/rk3328-evb.dts | 1 +
arch/arm/dts/rk3328-sdram-ddr3-666.dtsi | 215 ++++++++++++++++++++++++++++++
arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi | 215 ++++++++++++++++++++++++++++++
arch/arm/dts/rk3328.dtsi | 11 +-
4 files changed, 439 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
create mode 100644 arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 36c0c00..7ab8c42 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -6,6 +6,7 @@
/dts-v1/;
#include "rk3328.dtsi"
+#include "rk3328-sdram-ddr3-666.dtsi"
/ {
model = "Rockchip RK3328 EVB";
diff --git a/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
new file mode 100644
index 0000000..d99e7e0
--- /dev/null
+++ b/arch/arm/dts/rk3328-sdram-ddr3-666.dtsi
@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+&dmc {
+ rockchip,sdram-params = <
+ 0x1
+ 0xC
+ 0x3
+ 0x1
+ 0x0
+ 0x0
+ 0x10
+ 0x10
+ 0
+
+ 0x9028b189
+ 0x00000000
+ 0x00000021
+ 0x00000482
+ 0x00000015
+ 0x00000222
+ 0x000000ff
+
+ 333
+ 3
+ 0
+
+ 0x00000000
+ 0x43041001
+ 0x00000064
+ 0x0028003b
+ 0x000000d0
+ 0x00020053
+ 0x000000d4
+ 0x00020000
+ 0x000000d8
+ 0x00000100
+ 0x000000dc
+ 0x03200000
+ 0x000000e0
+ 0x00000000
+ 0x000000e4
+ 0x00090000
+ 0x000000f4
+ 0x000f011f
+ 0x00000100
+ 0x07090b06
+ 0x00000104
+ 0x00050209
+ 0x00000108
+ 0x03030407
+ 0x0000010c
+ 0x00202006
+ 0x00000110
+ 0x03020204
+ 0x00000114
+ 0x03030202
+ 0x00000120
+ 0x00000903
+ 0x00000180
+ 0x00800020
+ 0x00000184
+ 0x00000000
+ 0x00000190
+ 0x07010001
+ 0x00000198
+ 0x05001100
+ 0x000001a0
+ 0xc0400003
+ 0x00000240
+ 0x06000604
+ 0x00000244
+ 0x00000201
+ 0x00000250
+ 0x00000f00
+ 0x00000490
+ 0x00000001
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+
+ 0x00000004
+ 0x0000000a
+ 0x00000028
+ 0x00000006
+ 0x0000002c
+ 0x00000000
+ 0x00000030
+ 0x00000005
+ 0xffffffff
+ 0xffffffff
+
+ 0x77
+ 0x88
+ 0x79
+ 0x79
+ 0x87
+ 0x97
+ 0x87
+ 0x78
+ 0x77
+ 0x78
+ 0x87
+ 0x88
+ 0x87
+ 0x87
+ 0x77
+
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x69
+ 0x9
+
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x79
+ 0x9
+
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x69
+ 0x9
+
+ 0x77
+ 0x78
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x79
+ 0x9
+
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x69
+ 0x9
+
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x79
+ 0x9
+
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x69
+ 0x9
+
+ 0x77
+ 0x78
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x79
+ 0x9
+ >;
+};
diff --git a/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
b/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
new file mode 100644
index 0000000..62d809e
--- /dev/null
+++ b/arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+&dmc {
+ rockchip,sdram-params = <
+ 0x1
+ 0xC
+ 0x3
+ 0x1
+ 0x0
+ 0x0
+ 0x10
+ 0x10
+ 0
+
+ 0x0c48a18a
+ 0x00000000
+ 0x00000021
+ 0x00000482
+ 0x00000015
+ 0x0000021a
+ 0x000000ff
+
+ 333
+ 6
+ 0
+
+ 0x00000000
+ 0xc3040008
+ 0x00000064
+ 0x00140023
+ 0x000000d0
+ 0x00220002
+ 0x000000d4
+ 0x00010000
+ 0x000000d8
+ 0x00000703
+ 0x000000dc
+ 0x00830004
+ 0x000000e0
+ 0x00010000
+ 0x000000e4
+ 0x00070003
+ 0x00000100
+ 0x06090b07
+ 0x00000104
+ 0x0002020b
+ 0x00000108
+ 0x02030506
+ 0x0000010c
+ 0x00505000
+ 0x00000110
+ 0x03020204
+ 0x00000114
+ 0x01010303
+ 0x00000118
+ 0x02020003
+ 0x00000120
+ 0x00000303
+ 0x00000138
+ 0x00000025
+ 0x00000180
+ 0x003c000f
+ 0x00000184
+ 0x00900000
+ 0x00000190
+ 0x07020000
+ 0x00000198
+ 0x05001100
+ 0x000001a0
+ 0xc0400003
+ 0x00000240
+ 0x0900090c
+ 0x00000244
+ 0x00000101
+ 0x00000250
+ 0x00000f00
+ 0x00000490
+ 0x00000001
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+
+ 0x00000004
+ 0x0000000b
+ 0x00000028
+ 0x00000006
+ 0x0000002c
+ 0x00000000
+ 0x00000030
+ 0x00000003
+ 0xffffffff
+ 0xffffffff
+
+ 0x77
+ 0x88
+ 0x79
+ 0x79
+ 0x87
+ 0x97
+ 0x87
+ 0x78
+ 0x77
+ 0x78
+ 0x87
+ 0x88
+ 0x87
+ 0x87
+ 0x77
+
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x69
+ 0x9
+
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x79
+ 0x9
+
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x69
+ 0x9
+
+ 0x77
+ 0x78
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x79
+ 0x9
+
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x69
+ 0x9
+
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x79
+ 0x9
+
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x69
+ 0x9
+
+ 0x77
+ 0x78
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x79
+ 0x9
+ >;
+};
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 51da1e9..b821c4c 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -354,10 +354,15 @@
status = "disabled";
};
- dmc: dmc@ff400000 {
+ dmc: dmc {
u-boot,dm-pre-reloc;
- compatible = "rockchip,rk3328-dmc", "syscon";
- reg = <0x0 0xff400000 0x0 0x1000>;
+ compatible = "rockchip,rk3328-dmc";
+ reg = <0x0 0xff400000 0x0 0x1000
+ 0x0 0xff780000 0x0 0x3000
+ 0x0 0xff100000 0x0 0x1000
+ 0x0 0xff440000 0x0 0x1000
+ 0x0 0xff720000 0x0 0x1000
+ 0x0 0xff798000 0x0 0x1000>;
};
cru: clock-controller@ff440000 {
--
1.9.1
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