On Tue, 2017-09-26 at 16:37 -0500, Dinh Nguyen wrote:
> On Tue, Sep 19, 2017 at 4:22 AM, <chin.liang....@intel.com> wrote:
> >
> > From: Chin Liang See <chin.liang....@intel.com>
> >
> > Device tree for Stratix10 SoC
> >
> > Signed-off-by: Chin Liang See <chin.liang....@intel.com>
> > ---
> > arch/arm/dts/Makefile | 3 +-
> > arch/arm/dts/socfpga_stratix10_socdk.dts | 141
> > +++++++++++++++++++++++++++++++
> > 2 files changed, 143 insertions(+), 1 deletion(-)
> > create mode 100644 arch/arm/dts/socfpga_stratix10_socdk.dts
> >
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index fee4680..4cf5fd0 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -171,7 +171,8 @@ dtb-$(CONFIG_ARCH_SOCFPGA)
> > += \
> > socfpga_cyclone5_sockit.dtb \
> > socfpga_cyclone5_socrates.dtb \
> > socfpga_cyclone5_sr1500.dtb \
> > - socfpga_cyclone5_vining_fpga.dtb
> > + socfpga_cyclone5_vining_fpga.dtb \
> > + socfpga_stratix10_socdk.dtb
> >
> > dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \
> > dra72-evm-revc.dtb dra71-evm.dtb dra76-evm.dtb
> > diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts
> > b/arch/arm/dts/socfpga_stratix10_socdk.dts
> > new file mode 100644
> > index 0000000..484c630
> > --- /dev/null
> > +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts
> > @@ -0,0 +1,141 @@
> > +/*
> > + * Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
> > + *
> > + * SPDX-License-Identifier: GPL-2.0
> > + */
> > +
> > +/dts-v1/;
> > +#include "skeleton.dtsi"
> > +#include <dt-bindings/reset/altr,rst-mgr-s10.h>
> > +
> > +/ {
> > + model = "Intel SOCFPGA Stratix 10 SoC Development Kit";
> > + compatible = "altr,socfpga-stratix10", "altr,socfpga";
> > +
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + chosen {
> > + bootargs = "console=ttyS0,115200";
> > + };
> > +
> > + aliases {
> > + ethernet0 = &gmac0;
> > + spi0 = &qspi;
> > + };
> > +
> > + memory {
> > + name = "memory";
> > + device_type = "memory";
> > + reg = <0x0 0x80000000>; /* 2GB */
> > + };
> > +
> > + regulator_3_3v: 3-3-v-regulator {
> > + compatible = "regulator-fixed";
> > + regulator-name = "3.3V";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + };
> > +
> > + soc {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "simple-bus";
> > + device_type = "soc";
> > + ranges;
> > + u-boot,dm-pre-reloc;
> > +
> > + rst: rstmgr@ffd11000 {
> > + #reset-cells = <1>;
> > + compatible = "altr,rst-mgr";
> > + reg = <0xffd11000 0x100>;
> > + altr,modrst-offset = <0x20>;
> > + };
> Where are the cpu nodes?
yes, need to be added
CHin Liang
>
> Dinh
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