Hi, 2017-09-14 7:27 GMT+09:00 Thomas Petazzoni <thomas.petazz...@free-electrons.com>: > Hello, > > On Mon, 28 Aug 2017 14:16:38 +0200, Thomas Petazzoni wrote: >> In the SH7785/SH7786 case, the SCSCR value is harcoded to be 0x3a, >> which means bits CKE1/CKE0 have the value 10b. This tells the SCIF >> that the "External clock/SCIF_SCK pin functions as clock input". >> >> However, this is not the case in all designs, and it's the purpose of >> the clk_mode = EXT_CLK to indicate such a setting. >> >> In order for the serial_sh driver to work on a SH7786 platform that >> does not use SCIF_SCK as a clock input, we have to adjust the >> SCSCR_INIT value, to have CKE1/CKE0 set to 00b. This is similar to >> what is done for other SH platforms. >> >> Signed-off-by: Thomas Petazzoni <thomas.petazz...@free-electrons.com> > > Any comments on this patch ?
Sorry, reply is too late. Applied, thanks. > > Thanks, > > Thomas > -- > Thomas Petazzoni, CTO, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com Best regards, Nobuhiro -- Nobuhiro Iwamatsu iwamatsu at {nigauri.org / debian.org} GPG ID: 40AD1FA6 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
