From: Jagan Teki <ja...@amarulasolutions.com>
Falcon mode, is updating DDR dt node configuration through
spl_fixup_fdt() so add appropriate DDR base and size through
dram_init_banksize.
Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
---
arch/arm/mach-rockchip/rk3288-board-spl.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c
b/arch/arm/mach-rockchip/rk3288-board-spl.c
index febc1ef..9eee9c5 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -19,7 +19,9 @@
#include <asm/arch/clock.h>
#include <asm/arch/hardware.h>
#include <asm/arch/periph.h>
+#include <asm/arch/pmu_rk3288.h>
#include <asm/arch/sdram.h>
+#include <asm/arch/sdram_common.h>
#include <asm/arch/timer.h>
#include <dm/pinctrl.h>
#include <dm/root.h>
@@ -329,3 +331,18 @@ err:
/* No way to report error here */
hang();
}
+
+#ifdef CONFIG_SPL_OS_BOOT
+
+#define PMU_BASE 0xff730000
+int dram_init_banksize(void)
+{
+ struct rk3288_pmu *const pmu = (void *)PMU_BASE;
+ size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]);
+
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = size;
+
+ return 0;
+}
+#endif
--
2.7.4
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